drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
Extension: .h
Size: 7179 bytes
Lines: 167
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

linux/types.h
linux/spinlock.h
amdgpu_ip.h

Detected Declarations

struct amdgpu_device
struct amdgpu_reg_ind
struct amdgpu_reg_ind_blk
struct amdgpu_reg_pcie_ind
struct amdgpu_reg_smn_ext
struct amdgpu_reg_access

Annotated Snippet

struct amdgpu_reg_ind {
	spinlock_t lock;
	amdgpu_rreg_t rreg;
	amdgpu_wreg_t wreg;
};

struct amdgpu_reg_ind_blk {
	spinlock_t lock;
	amdgpu_block_rreg_t rreg;
	amdgpu_block_wreg_t wreg;
};

struct amdgpu_reg_pcie_ind {
	spinlock_t lock;
	amdgpu_rreg_t rreg;
	amdgpu_wreg_t wreg;
	amdgpu_rreg_ext_t rreg_ext;
	amdgpu_wreg_ext_t wreg_ext;
	amdgpu_rreg64_t rreg64;
	amdgpu_wreg64_t wreg64;
	amdgpu_rreg64_ext_t rreg64_ext;
	amdgpu_wreg64_ext_t wreg64_ext;
	amdgpu_rreg_t port_rreg;
	amdgpu_wreg_t port_wreg;
};

struct amdgpu_reg_smn_ext {
	amdgpu_reg_get_smn_base64_t get_smn_base;
};

struct amdgpu_reg_access {
	struct amdgpu_reg_ind smc;
	struct amdgpu_reg_ind uvd_ctx;
	struct amdgpu_reg_ind didt;
	struct amdgpu_reg_ind gc_cac;
	struct amdgpu_reg_ind se_cac;
	struct amdgpu_reg_ind_blk audio_endpt;
	struct amdgpu_reg_pcie_ind pcie;
	struct amdgpu_reg_smn_ext smn;
};

void amdgpu_reg_access_init(struct amdgpu_device *adev);
uint32_t amdgpu_reg_smc_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_smc_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_uvd_ctx_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_uvd_ctx_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_didt_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_didt_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_gc_cac_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_gc_cac_wr32(struct amdgpu_device *adev, uint32_t reg,
			    uint32_t v);
uint32_t amdgpu_reg_se_cac_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_se_cac_wr32(struct amdgpu_device *adev, uint32_t reg,
			    uint32_t v);
uint32_t amdgpu_reg_audio_endpt_rd32(struct amdgpu_device *adev, uint32_t block,
				     uint32_t reg);
void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block,
				 uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_pcie_ext_rd32(struct amdgpu_device *adev, uint64_t reg);
void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
			      uint32_t v);
uint64_t amdgpu_reg_pcie_rd64(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pcie_wr64(struct amdgpu_device *adev, uint32_t reg, uint64_t v);
uint64_t amdgpu_reg_pcie_ext_rd64(struct amdgpu_device *adev, uint64_t reg);
void amdgpu_reg_pcie_ext_wr64(struct amdgpu_device *adev, uint64_t reg,
			      uint64_t v);
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
			   uint32_t v);
uint64_t amdgpu_reg_get_smn_base64(struct amdgpu_device *adev,
				   enum amd_hw_ip_block_type block,
				   int die_inst);
uint64_t amdgpu_reg_smn_v1_0_get_base(struct amdgpu_device *adev,
				      enum amd_hw_ip_block_type block,
				      int die_inst);

uint32_t amdgpu_device_rreg(struct amdgpu_device *adev, uint32_t reg,
			    uint32_t acc_flags);
uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev, uint32_t reg,
				uint32_t acc_flags, uint32_t xcc_id);
void amdgpu_device_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,
			uint32_t acc_flags);
void amdgpu_device_xcc_wreg(struct amdgpu_device *adev, uint32_t reg,
			    uint32_t v, uint32_t acc_flags, uint32_t xcc_id);
void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg,
			     uint32_t v, uint32_t xcc_id);
void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset,
		     uint8_t value);

Annotation

Immediate include surface: `linux/types.h`, `linux/spinlock.h`, `amdgpu_ip.h`.
Detected declarations: `struct amdgpu_device`, `struct amdgpu_reg_ind`, `struct amdgpu_reg_ind_blk`, `struct amdgpu_reg_pcie_ind`, `struct amdgpu_reg_smn_ext`, `struct amdgpu_reg_access`.
Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.