drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h- Extension
.h- Size
- 9787 bytes
- Lines
- 271
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dma-direction.hdrm/gpu_scheduler.hdrm/ttm/ttm_placement.hamdgpu_vram_mgr.hamdgpu_hmm.hamdgpu_gmc.h
Detected Declarations
struct hmm_rangestruct amdgpu_gtt_mgrstruct amdgpu_ttm_buffer_entitystruct amdgpu_vram_resvstruct amdgpu_mmanstruct amdgpu_copy_memenum amdgpu_resv_region_idfunction amdgpu_ttm_tt_get_user_pagesfunction amdgpu_compute_gart_addressfunction amdgpu_gtt_node_to_byte_offset
Annotated Snippet
struct amdgpu_gtt_mgr {
struct ttm_resource_manager manager;
struct drm_mm mm;
spinlock_t lock;
};
struct amdgpu_ttm_buffer_entity {
struct drm_sched_entity base;
struct mutex lock;
struct drm_mm_node gart_node;
u64 gart_window_offs[2];
};
enum amdgpu_resv_region_id {
AMDGPU_RESV_STOLEN_VGA,
AMDGPU_RESV_STOLEN_EXTENDED,
AMDGPU_RESV_STOLEN_RESERVED,
AMDGPU_RESV_FW,
AMDGPU_RESV_FW_EXTEND,
AMDGPU_RESV_FW_VRAM_USAGE,
AMDGPU_RESV_DRV_VRAM_USAGE,
AMDGPU_RESV_MEM_TRAIN,
AMDGPU_RESV_MAX
};
struct amdgpu_vram_resv {
uint64_t offset;
uint64_t size;
struct amdgpu_bo *bo;
void *cpu_ptr;
bool needs_cpu_map;
};
struct amdgpu_mman {
struct ttm_device bdev;
struct ttm_pool *ttm_pools;
bool initialized;
void __iomem *aper_base_kaddr;
/* buffer handling */
const struct amdgpu_buffer_funcs *buffer_funcs;
struct drm_gpu_scheduler *buffer_funcs_scheds[AMDGPU_MAX_RINGS];
u32 num_buffer_funcs_scheds;
bool buffer_funcs_enabled;
/* @default_entity: for workarounds, has no gart windows */
struct amdgpu_ttm_buffer_entity default_entity;
struct amdgpu_ttm_buffer_entity *clear_entities;
atomic_t next_clear_entity;
u32 num_clear_entities;
struct amdgpu_ttm_buffer_entity move_entities[TTM_NUM_MOVE_FENCES];
atomic_t next_move_entity;
u32 num_move_entities;
struct amdgpu_vram_mgr vram_mgr;
struct amdgpu_gtt_mgr gtt_mgr;
struct ttm_resource_manager preempt_mgr;
bool keep_stolen_vga_memory;
struct amdgpu_vram_resv resv_region[AMDGPU_RESV_MAX];
/* PAGE_SIZE'd BO for process memory r/w over SDMA. */
struct amdgpu_bo *sdma_access_bo;
void *sdma_access_ptr;
};
struct amdgpu_copy_mem {
struct ttm_buffer_object *bo;
struct ttm_resource *mem;
unsigned long offset;
};
#define AMDGPU_COPY_FLAGS_TMZ (1 << 0)
#define AMDGPU_COPY_FLAGS_READ_DECOMPRESSED (1 << 1)
#define AMDGPU_COPY_FLAGS_WRITE_COMPRESSED (1 << 2)
#define AMDGPU_COPY_FLAGS_MAX_COMPRESSED_SHIFT 3
#define AMDGPU_COPY_FLAGS_MAX_COMPRESSED_MASK 0x03
#define AMDGPU_COPY_FLAGS_NUMBER_TYPE_SHIFT 5
#define AMDGPU_COPY_FLAGS_NUMBER_TYPE_MASK 0x07
#define AMDGPU_COPY_FLAGS_DATA_FORMAT_SHIFT 8
#define AMDGPU_COPY_FLAGS_DATA_FORMAT_MASK 0x3f
#define AMDGPU_COPY_FLAGS_WRITE_COMPRESS_DISABLE_SHIFT 14
#define AMDGPU_COPY_FLAGS_WRITE_COMPRESS_DISABLE_MASK 0x1
#define AMDGPU_COPY_FLAGS_SET(field, value) \
(((__u32)(value) & AMDGPU_COPY_FLAGS_##field##_MASK) << AMDGPU_COPY_FLAGS_##field##_SHIFT)
#define AMDGPU_COPY_FLAGS_GET(value, field) \
(((__u32)(value) >> AMDGPU_COPY_FLAGS_##field##_SHIFT) & AMDGPU_COPY_FLAGS_##field##_MASK)
Annotation
- Immediate include surface: `linux/dma-direction.h`, `drm/gpu_scheduler.h`, `drm/ttm/ttm_placement.h`, `amdgpu_vram_mgr.h`, `amdgpu_hmm.h`, `amdgpu_gmc.h`.
- Detected declarations: `struct hmm_range`, `struct amdgpu_gtt_mgr`, `struct amdgpu_ttm_buffer_entity`, `struct amdgpu_vram_resv`, `struct amdgpu_mman`, `struct amdgpu_copy_mem`, `enum amdgpu_resv_region_id`, `function amdgpu_ttm_tt_get_user_pages`, `function amdgpu_compute_gart_address`, `function amdgpu_gtt_node_to_byte_offset`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.