drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h
Extension
.h
Size
7566 bytes
Lines
247
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct umsch_mm_set_resource_input {
	uint32_t vmid_mask_mm_vcn;
	uint32_t vmid_mask_mm_vpe;
	uint32_t collaboration_mask_vpe;
	uint32_t logging_vmid;
	uint32_t engine_mask;
	union {
		struct {
			uint32_t disable_reset : 1;
			uint32_t disable_umsch_mm_log : 1;
			uint32_t use_rs64mem_for_proc_ctx_csa : 1;
			uint32_t reserved : 29;
		};
		uint32_t uint32_all;
	};
};

struct amdgpu_umsch_fwlog {
	uint32_t rptr;
	uint32_t wptr;
	uint32_t buffer_size;
	uint32_t header_size;
	uint32_t wrapped;
};

struct umsch_mm_add_queue_input {
	uint32_t process_id;
	uint64_t page_table_base_addr;
	uint64_t process_va_start;
	uint64_t process_va_end;
	uint64_t process_quantum;
	uint64_t process_csa_addr;
	uint64_t context_quantum;
	uint64_t context_csa_addr;
	uint32_t inprocess_context_priority;
	enum UMSCH_CONTEXT_PRIORITY_LEVEL context_global_priority_level;
	uint32_t doorbell_offset_0;
	uint32_t doorbell_offset_1;
	enum UMSCH_SWIP_ENGINE_TYPE engine_type;
	uint32_t affinity;
	uint64_t mqd_addr;
	uint64_t h_context;
	uint64_t h_queue;
	uint32_t vm_context_cntl;

	uint32_t process_csa_array_index;
	uint32_t context_csa_array_index;

	struct {
		uint32_t is_context_suspended : 1;
		uint32_t collaboration_mode : 1;
		uint32_t reserved : 30;
	};
};

struct umsch_mm_remove_queue_input {
	uint32_t doorbell_offset_0;
	uint32_t doorbell_offset_1;
	uint64_t context_csa_addr;
	uint32_t context_csa_array_index;
};

struct MQD_INFO {
	uint32_t rb_base_hi;
	uint32_t rb_base_lo;
	uint32_t rb_size;
	uint32_t wptr_val;
	uint32_t rptr_val;
	uint32_t unmapped;
	uint32_t vmid;
};

struct amdgpu_umsch_mm;

struct umsch_mm_funcs {
	int (*set_hw_resources)(struct amdgpu_umsch_mm *umsch);
	int (*add_queue)(struct amdgpu_umsch_mm *umsch,
			 struct umsch_mm_add_queue_input *input);
	int (*remove_queue)(struct amdgpu_umsch_mm *umsch,
			    struct umsch_mm_remove_queue_input *input);
	int (*set_regs)(struct amdgpu_umsch_mm *umsch);
	int (*init_microcode)(struct amdgpu_umsch_mm *umsch);
	int (*load_microcode)(struct amdgpu_umsch_mm *umsch);
	int (*ring_init)(struct amdgpu_umsch_mm *umsch);
	int (*ring_start)(struct amdgpu_umsch_mm *umsch);
	int (*ring_stop)(struct amdgpu_umsch_mm *umsch);
	int (*ring_fini)(struct amdgpu_umsch_mm *umsch);
};

struct amdgpu_umsch_mm {

Annotation

Implementation Notes