drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h
Extension
.h
Size
5999 bytes
Lines
187
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct amdgpu_userq_obj {
	void		 *cpu_ptr;
	uint64_t	 gpu_addr;
	struct amdgpu_bo *obj;
};

struct amdgpu_usermode_queue {
	int			queue_type;
	enum amdgpu_userq_state state;
	uint64_t		doorbell_handle;
	uint64_t		doorbell_index;
	uint64_t		flags;
	struct amdgpu_mqd_prop	*userq_prop;
	struct amdgpu_userq_mgr *userq_mgr;
	struct amdgpu_vm	*vm;
	struct amdgpu_userq_obj mqd;
	struct amdgpu_userq_obj	db_obj;
	struct amdgpu_userq_obj fw_obj;
	struct amdgpu_userq_obj wptr_obj;

	/**
	 * @fence_drv_lock: Protecting @fence_drv_xa.
	 */
	struct mutex		fence_drv_lock;

	/**
	 * @fence_drv_xa:
	 *
	 * References to the external fence drivers returned by wait_ioctl.
	 * Dropped on the next signaled dma_fence or queue destruction.
	 */
	struct xarray		fence_drv_xa;
	struct amdgpu_userq_fence_driver *fence_drv;
	struct dma_fence	*last_fence;
	u32			xcp_id;
	int			priority;
	struct dentry		*debugfs_queue;

	/**
	 * @hang_detect_work:
	 *
	 * Delayed work which runs when userq_fences time out.
	 */
	struct delayed_work	hang_detect_work;
	struct kref		refcount;

	union {
		struct {
			u64 queue_rb;
			u64 wptr;
			u64 rptr;
			u64 eop;
			u64 shadow;
			u64 csa;
		} va;
		u64 va_array[6];
	} userq_vas;
};

struct amdgpu_userq_funcs {
	int (*mqd_create)(struct amdgpu_usermode_queue *queue,
			  struct drm_amdgpu_userq_in *args);
	int (*mqd_update)(struct amdgpu_usermode_queue *queue,
			  struct drm_amdgpu_userq_in *args);
	void (*mqd_destroy)(struct amdgpu_usermode_queue *uq);
	int (*unmap)(struct amdgpu_usermode_queue *queue);
	int (*map)(struct amdgpu_usermode_queue *queue);
	int (*preempt)(struct amdgpu_usermode_queue *queue);
	int (*restore)(struct amdgpu_usermode_queue *queue);
	int (*detect_and_reset)(struct amdgpu_device *adev,
		  int queue_type);
};

/* Usermode queues for gfx */
struct amdgpu_userq_mgr {
	/**
	 * @userq_xa: Per-process user queue map (queue ID → queue)
	 * Key: queue_id (unique ID within the process's userq manager)
	 * Value: struct amdgpu_usermode_queue
	 */
	struct xarray			userq_xa;
	struct mutex			userq_mutex;
	struct amdgpu_device		*adev;
	struct delayed_work		resume_work;
	struct drm_file			*file;

	/**
	 * @reset_work:
	 *
	 * Reset work which is used when eviction fails.

Annotation

Implementation Notes