drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c- Extension
.c- Size
- 8335 bytes
- Lines
- 306
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu_vm.hamdgpu_job.hamdgpu_object.hamdgpu_trace.h
Detected Declarations
function filesfunction amdgpu_vm_sdma_alloc_jobfunction amdgpu_vm_sdma_preparefunction amdgpu_vm_sdma_commitfunction amdgpu_vm_sdma_copy_ptesfunction amdgpu_vm_sdma_set_ptesfunction amdgpu_vm_sdma_update
Annotated Snippet
if (r) {
dma_fence_put(fence);
dma_resv_iter_end(&cursor);
return r;
}
}
dma_resv_iter_end(&cursor);
do {
ndw = p->num_dw_left;
ndw -= p->job->ibs->length_dw;
if (ndw < 32) {
r = amdgpu_vm_sdma_commit(p, NULL);
if (r)
return r;
r = amdgpu_vm_sdma_alloc_job(p, count,
AMDGPU_KERNEL_JOB_ID_VM_UPDATE);
if (r)
return r;
}
if (!p->pages_addr) {
if (p->override_pte)
amdgpu_gmc_override_vm_pte_flags(p->adev, p->vm, addr, &flags);
/* set page commands needed */
amdgpu_vm_sdma_set_ptes(p, bo, pe, addr, count,
incr, flags);
return 0;
}
/* copy commands needed */
ndw -= p->adev->vm_manager.vm_pte_funcs->copy_pte_num_dw;
/* for padding */
ndw -= 7;
nptes = min(count, ndw / 2);
/* Put the PTEs at the end of the IB. */
p->num_dw_left -= nptes * 2;
pte = (uint64_t *)&(p->job->ibs->ptr[p->num_dw_left]);
for (i = 0; i < nptes; ++i, addr += incr) {
u64 oflags = flags;
pte[i] = amdgpu_vm_map_gart(p->pages_addr, addr);
if (p->override_pte)
amdgpu_gmc_override_vm_pte_flags(p->adev, p->vm, pte[i], &oflags);
pte[i] |= oflags;
}
amdgpu_vm_sdma_copy_ptes(p, bo, pe, nptes);
pe += nptes * 8;
count -= nptes;
} while (count);
return 0;
}
const struct amdgpu_vm_update_funcs amdgpu_vm_sdma_funcs = {
.map_table = amdgpu_vm_sdma_map_table,
.prepare = amdgpu_vm_sdma_prepare,
.update = amdgpu_vm_sdma_update,
.commit = amdgpu_vm_sdma_commit
};
Annotation
- Immediate include surface: `amdgpu_vm.h`, `amdgpu_job.h`, `amdgpu_object.h`, `amdgpu_trace.h`.
- Detected declarations: `function files`, `function amdgpu_vm_sdma_alloc_job`, `function amdgpu_vm_sdma_prepare`, `function amdgpu_vm_sdma_commit`, `function amdgpu_vm_sdma_copy_ptes`, `function amdgpu_vm_sdma_set_ptes`, `function amdgpu_vm_sdma_update`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.