drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c- Extension
.c- Size
- 54676 bytes
- Lines
- 1784
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/list.hamdgpu.hamdgpu_xgmi.hamdgpu_ras.hsoc15.hdf/df_3_6_offset.hxgmi/xgmi_4_0_0_smn.hxgmi/xgmi_4_0_0_sh_mask.hxgmi/xgmi_6_1_0_sh_mask.hwafl/wafl2_4_0_0_smn.hwafl/wafl2_4_0_0_sh_mask.hamdgpu_reset.h
Detected Declarations
function amdgpu_xgmi_get_ext_linkfunction xgmi_v6_4_get_link_statusfunction amdgpu_get_xgmi_link_statusfunction amdgpu_xgmi_show_attrsfunction amdgpu_xgmi_hive_releasefunction amdgpu_xgmi_show_device_idfunction amdgpu_xgmi_show_physical_idfunction amdgpu_xgmi_show_num_hopsfunction amdgpu_xgmi_show_num_linksfunction amdgpu_xgmi_show_connected_port_numfunction amdgpu_xgmi_show_errorfunction amdgpu_xgmi_sysfs_add_dev_infofunction amdgpu_xgmi_sysfs_rem_dev_infofunction list_for_each_entryfunction amdgpu_put_xgmi_hivefunction amdgpu_xgmi_set_pstatefunction amdgpu_xgmi_update_topologyfunction amdgpu_xgmi_get_hops_countfunction amdgpu_xgmi_get_bandwidthfunction amdgpu_xgmi_get_is_sharing_enabledfunction amdgpu_xgmi_initialize_hive_get_data_partitionfunction list_for_each_entryfunction amdgpu_xgmi_add_devicefunction list_for_each_entryfunction list_for_each_entryfunction amdgpu_xgmi_remove_devicefunction xgmi_v6_4_0_aca_bank_parserfunction amdgpu_xgmi_ras_late_initfunction amdgpu_xgmi_get_relative_phy_addrfunction pcs_clear_statusfunction amdgpu_xgmi_legacy_reset_ras_error_countfunction __xgmi_v6_4_0_reset_error_countfunction xgmi_v6_4_0_reset_error_countfunction xgmi_v6_4_0_reset_ras_error_countfunction amdgpu_xgmi_reset_ras_error_countfunction amdgpu_xgmi_query_pcs_error_statusfunction amdgpu_xgmi_legacy_query_ras_error_countfunction xgmi_v6_4_0_pcs_mca_get_error_typefunction __xgmi_v6_4_0_query_error_countfunction xgmi_v6_4_0_query_error_countfunction xgmi_v6_4_0_query_ras_error_countfunction amdgpu_xgmi_query_ras_error_countfunction amdgpu_ras_error_inject_xgmifunction amdgpu_xgmi_ras_sw_initfunction amdgpu_xgmi_reset_on_init_workfunction list_for_each_entryfunction amdgpu_xgmi_schedule_reset_on_initfunction amdgpu_xgmi_reset_on_init
Annotated Snippet
if (top->nodes[i].node_id == adev->gmc.xgmi.node_id) {
current_node = i;
break;
}
}
if (i == top->num_nodes)
return -EINVAL;
for (i = 0; i < top->num_nodes; i++) {
for (j = 0; j < top->nodes[i].num_links; j++)
/* node id in sysfs starts from 1 rather than 0 so +1 here */
size += sysfs_emit_at(buf, size, "%02x:%02x -> %02x:%02x\n", current_node + 1,
top->nodes[i].port_num[j].src_xgmi_port_num, i + 1,
top->nodes[i].port_num[j].dst_xgmi_port_num);
}
return size;
}
#define AMDGPU_XGMI_SET_FICAA(o) ((o) | 0x456801)
static ssize_t amdgpu_xgmi_show_error(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = drm_to_adev(ddev);
uint32_t ficaa_pie_ctl_in, ficaa_pie_status_in;
uint64_t fica_out;
unsigned int error_count = 0;
ficaa_pie_ctl_in = AMDGPU_XGMI_SET_FICAA(0x200);
ficaa_pie_status_in = AMDGPU_XGMI_SET_FICAA(0x208);
if ((!adev->df.funcs) ||
(!adev->df.funcs->get_fica) ||
(!adev->df.funcs->set_fica))
return -EINVAL;
fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_ctl_in);
if (fica_out != 0x1f)
pr_err("xGMI error counters not enabled!\n");
fica_out = adev->df.funcs->get_fica(adev, ficaa_pie_status_in);
if ((fica_out & 0xffff) == 2)
error_count = ((fica_out >> 62) & 0x1) + (fica_out >> 63);
adev->df.funcs->set_fica(adev, ficaa_pie_status_in, 0, 0);
return sysfs_emit(buf, "%u\n", error_count);
}
static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);
static DEVICE_ATTR(xgmi_physical_id, 0444, amdgpu_xgmi_show_physical_id, NULL);
static DEVICE_ATTR(xgmi_error, S_IRUGO, amdgpu_xgmi_show_error, NULL);
static DEVICE_ATTR(xgmi_num_hops, S_IRUGO, amdgpu_xgmi_show_num_hops, NULL);
static DEVICE_ATTR(xgmi_num_links, S_IRUGO, amdgpu_xgmi_show_num_links, NULL);
static DEVICE_ATTR(xgmi_port_num, S_IRUGO, amdgpu_xgmi_show_connected_port_num, NULL);
static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
struct amdgpu_hive_info *hive)
{
int ret = 0;
char node[10] = { 0 };
/* Create xgmi device id file */
ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id);
if (ret) {
dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n");
return ret;
}
ret = device_create_file(adev->dev, &dev_attr_xgmi_physical_id);
if (ret) {
dev_err(adev->dev, "XGMI: Failed to create device file xgmi_physical_id\n");
return ret;
}
/* Create xgmi error file */
ret = device_create_file(adev->dev, &dev_attr_xgmi_error);
if (ret)
pr_err("failed to create xgmi_error\n");
/* Create xgmi num hops file */
ret = device_create_file(adev->dev, &dev_attr_xgmi_num_hops);
if (ret)
pr_err("failed to create xgmi_num_hops\n");
Annotation
- Immediate include surface: `linux/list.h`, `amdgpu.h`, `amdgpu_xgmi.h`, `amdgpu_ras.h`, `soc15.h`, `df/df_3_6_offset.h`, `xgmi/xgmi_4_0_0_smn.h`, `xgmi/xgmi_4_0_0_sh_mask.h`.
- Detected declarations: `function amdgpu_xgmi_get_ext_link`, `function xgmi_v6_4_get_link_status`, `function amdgpu_get_xgmi_link_status`, `function amdgpu_xgmi_show_attrs`, `function amdgpu_xgmi_hive_release`, `function amdgpu_xgmi_show_device_id`, `function amdgpu_xgmi_show_physical_id`, `function amdgpu_xgmi_show_num_hops`, `function amdgpu_xgmi_show_num_links`, `function amdgpu_xgmi_show_connected_port_num`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.