drivers/gpu/drm/amd/amdgpu/df_v1_7.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/amdgpu/df_v1_7.h

Extension

.h

Size

1521 bytes

Lines

41

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• soc15_common.h

Detected Declarations

• enum DF_V1_7_MGCG

Annotated Snippet

#ifndef __DF_V1_7_H__
#define __DF_V1_7_H__

#include "soc15_common.h"
enum DF_V1_7_MGCG
{
	DF_V1_7_MGCG_DISABLE = 0,
	DF_V1_7_MGCG_ENABLE_00_CYCLE_DELAY =1,
	DF_V1_7_MGCG_ENABLE_01_CYCLE_DELAY =2,
	DF_V1_7_MGCG_ENABLE_15_CYCLE_DELAY =13,
	DF_V1_7_MGCG_ENABLE_31_CYCLE_DELAY =14,
	DF_V1_7_MGCG_ENABLE_63_CYCLE_DELAY =15
};

extern const struct amdgpu_df_funcs df_v1_7_funcs;

#endif

Annotation

• Immediate include surface: `soc15_common.h`.
• Detected declarations: `enum DF_V1_7_MGCG`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.