drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c
Extension
.c
Size
43211 bytes
Lines
1020
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (sec_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, SEC %d\n", i,
				 vml2_mems[i], sec_count);
			err_data->ce_count += sec_count;
		}

		ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT);
		if (ded_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, DED %d\n", i,
				 vml2_mems[i], ded_count);
			err_data->ue_count += ded_count;
		}
	}

	for (i = 0; i < ARRAY_SIZE(vml2_walker_mems); i++) {
		WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, i);
		data = RREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL);

		sec_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL,
					  SEC_COUNT);
		if (sec_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, SEC %d\n", i,
				 vml2_walker_mems[i], sec_count);
			err_data->ce_count += sec_count;
		}

		ded_count = REG_GET_FIELD(data, VML2_WALKER_MEM_ECC_CNTL,
					  DED_COUNT);
		if (ded_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, DED %d\n", i,
				 vml2_walker_mems[i], ded_count);
			err_data->ue_count += ded_count;
		}
	}

	for (i = 0; i < ARRAY_SIZE(utcl2_router_mems); i++) {
		WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, i);
		data = RREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL);

		sec_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, SEC_COUNT);
		if (sec_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, SEC %d\n", i,
				 utcl2_router_mems[i], sec_count);
			err_data->ce_count += sec_count;
		}

		ded_count = REG_GET_FIELD(data, UTCL2_MEM_ECC_CNTL, DED_COUNT);
		if (ded_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, DED %d\n", i,
				 utcl2_router_mems[i], ded_count);
			err_data->ue_count += ded_count;
		}
	}

	for (i = 0; i < ARRAY_SIZE(atc_l2_cache_2m_mems); i++) {
		WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, i);
		data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL);

		sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL,
					  SEC_COUNT);
		if (sec_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, SEC %d\n", i,
				 atc_l2_cache_2m_mems[i], sec_count);
			err_data->ce_count += sec_count;
		}

		ded_count = REG_GET_FIELD(data, ATC_L2_CACHE_2M_DSM_CNTL,
					  DED_COUNT);
		if (ded_count) {
			dev_info(adev->dev,
				 "Instance[%d]: SubBlock %s, DED %d\n", i,
				 atc_l2_cache_2m_mems[i], ded_count);
			err_data->ue_count += ded_count;
		}
	}

	for (i = 0; i < ARRAY_SIZE(atc_l2_cache_4k_mems); i++) {
		WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, i);
		data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_CNTL);

		sec_count = REG_GET_FIELD(data, ATC_L2_CACHE_4K_DSM_CNTL,
					  SEC_COUNT);
		if (sec_count) {

Annotation

Implementation Notes