drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c- Extension
.c- Size
- 24222 bytes
- Lines
- 872
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu.hamdgpu_jpeg.hsoc15.hsoc15d.hjpeg_v2_0.hjpeg_v2_5.hvcn/vcn_2_5_offset.hvcn/vcn_2_5_sh_mask.hivsrcid/vcn/irqsrcs_vcn_2_0.h
Detected Declarations
function jpeg_v2_5_early_initfunction jpeg_v2_5_sw_initfunction jpeg_v2_5_sw_finifunction jpeg_v2_5_hw_initfunction jpeg_v2_5_hw_finifunction jpeg_v2_5_suspendfunction jpeg_v2_5_resumefunction jpeg_v2_5_disable_clock_gatingfunction jpeg_v2_5_enable_clock_gatingfunction jpeg_v2_5_start_instfunction jpeg_v2_5_startfunction jpeg_v2_5_stop_instfunction jpeg_v2_5_stopfunction jpeg_v2_5_dec_ring_get_rptrfunction jpeg_v2_5_dec_ring_get_wptrfunction jpeg_v2_5_dec_ring_set_wptrfunction jpeg_v2_6_dec_ring_insert_startfunction jpeg_v2_6_dec_ring_insert_endfunction jpeg_v2_5_is_idlefunction jpeg_v2_5_wait_for_idlefunction jpeg_v2_5_set_clockgating_statefunction jpeg_v2_5_set_powergating_statefunction jpeg_v2_5_set_interrupt_statefunction jpeg_v2_6_set_ras_interrupt_statefunction jpeg_v2_5_process_interruptfunction jpeg_v2_5_ring_resetfunction jpeg_v2_5_set_dec_ring_funcsfunction jpeg_v2_5_set_irq_funcsfunction jpeg_v2_6_query_poison_by_instancefunction jpeg_v2_6_query_ras_poison_statusfunction jpeg_v2_5_set_ras_funcs
Annotated Snippet
if (enable) {
if (!jpeg_v2_5_is_idle(ip_block))
return -EBUSY;
jpeg_v2_5_enable_clock_gating(adev, i);
} else {
jpeg_v2_5_disable_clock_gating(adev, i);
}
}
return 0;
}
static int jpeg_v2_5_set_powergating_state(struct amdgpu_ip_block *ip_block,
enum amd_powergating_state state)
{
struct amdgpu_device *adev = ip_block->adev;
int ret;
if (state == adev->jpeg.cur_state)
return 0;
if (state == AMD_PG_STATE_GATE)
ret = jpeg_v2_5_stop(adev);
else
ret = jpeg_v2_5_start(adev);
if (!ret)
adev->jpeg.cur_state = state;
return ret;
}
static int jpeg_v2_5_set_interrupt_state(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
unsigned type,
enum amdgpu_interrupt_state state)
{
return 0;
}
static int jpeg_v2_6_set_ras_interrupt_state(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
unsigned int type,
enum amdgpu_interrupt_state state)
{
return 0;
}
static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
uint32_t ip_instance;
switch (entry->client_id) {
case SOC15_IH_CLIENTID_VCN:
ip_instance = 0;
break;
case SOC15_IH_CLIENTID_VCN1:
ip_instance = 1;
break;
default:
DRM_ERROR("Unhandled client id: %d\n", entry->client_id);
return 0;
}
DRM_DEBUG("IH: JPEG TRAP\n");
switch (entry->src_id) {
case VCN_2_0__SRCID__JPEG_DECODE:
amdgpu_fence_process(adev->jpeg.inst[ip_instance].ring_dec);
break;
default:
DRM_ERROR("Unhandled interrupt: %d %d\n",
entry->src_id, entry->src_data[0]);
break;
}
return 0;
}
static int jpeg_v2_5_ring_reset(struct amdgpu_ring *ring,
unsigned int vmid,
struct amdgpu_fence *timedout_fence)
{
amdgpu_ring_reset_helper_begin(ring, timedout_fence);
jpeg_v2_5_stop_inst(ring->adev, ring->me);
jpeg_v2_5_start_inst(ring->adev, ring->me);
return amdgpu_ring_reset_helper_end(ring, timedout_fence);
}
Annotation
- Immediate include surface: `amdgpu.h`, `amdgpu_jpeg.h`, `soc15.h`, `soc15d.h`, `jpeg_v2_0.h`, `jpeg_v2_5.h`, `vcn/vcn_2_5_offset.h`, `vcn/vcn_2_5_sh_mask.h`.
- Detected declarations: `function jpeg_v2_5_early_init`, `function jpeg_v2_5_sw_init`, `function jpeg_v2_5_sw_fini`, `function jpeg_v2_5_hw_init`, `function jpeg_v2_5_hw_fini`, `function jpeg_v2_5_suspend`, `function jpeg_v2_5_resume`, `function jpeg_v2_5_disable_clock_gating`, `function jpeg_v2_5_enable_clock_gating`, `function jpeg_v2_5_start_inst`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.