drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c
Extension
.c
Size
22799 bytes
Lines
635
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (use_doorbell) {
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_ENABLE,
						       0x1);
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_AWID,
						       0xe);
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_RANGE_OFFSET,
						       doorbell_index);
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_RANGE_SIZE,
						       doorbell_size);
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_AWADDR_31_28_VALUE,
						       0x3);
		} else
			doorbell_range = REG_SET_FIELD(doorbell_range,
						       S2A_DOORBELL_ENTRY_2_CTRL,
						       S2A_DOORBELL_PORT2_RANGE_SIZE,
						       0);

		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_2_CTRL, doorbell_range);
	}
}

static void nbio_v4_3_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
					 int doorbell_index, int instance)
{
	u32 doorbell_range;

	if (instance)
		doorbell_range = RREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL);
	else
		doorbell_range = RREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL);

	if (use_doorbell) {
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_ENABLE,
					       0x1);
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_AWID,
					       instance ? 0x7 : 0x4);
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_RANGE_OFFSET,
					       doorbell_index);
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_RANGE_SIZE,
					       8);
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_AWADDR_31_28_VALUE,
					       instance ? 0x7 : 0x4);
	} else
		doorbell_range = REG_SET_FIELD(doorbell_range,
					       S2A_DOORBELL_ENTRY_4_CTRL,
					       S2A_DOORBELL_PORT4_RANGE_SIZE,
					       0);

	if (instance)
		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL, doorbell_range);
	else
		WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL, doorbell_range);
}

static void nbio_v4_3_gc_doorbell_init(struct amdgpu_device *adev)
{
	WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_0_CTRL, 0x30000007);
	WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d);
}

static void nbio_v4_3_enable_doorbell_aperture(struct amdgpu_device *adev,
					       bool enable)
{
	WREG32_FIELD15_PREREG(NBIO, 0, RCC_DEV0_EPF0_RCC_DOORBELL_APER_EN,
			BIF_DOORBELL_APER_EN, enable ? 1 : 0);
}

static void nbio_v4_3_enable_doorbell_selfring_aperture(struct amdgpu_device *adev,
							bool enable)
{

Annotation

Implementation Notes