drivers/gpu/drm/amd/amdgpu/nv.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/nv.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/nv.c
Extension
.c
Size
34275 bytes
Lines
1071
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (amdgpu_sriov_vf(adev)) {
			if (adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) {
				if (encode)
					*codecs = &sriov_sc_video_codecs_encode;
				else
					*codecs = &sriov_sc_video_codecs_decode_vcn1;
			} else {
				if (encode)
					*codecs = &sriov_sc_video_codecs_encode;
				else
					*codecs = &sriov_sc_video_codecs_decode_vcn0;
			}
		} else {
			if (adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) {
				if (encode)
					*codecs = &sc_video_codecs_encode;
				else
					*codecs = &sc_video_codecs_decode_vcn1;
			} else {
				if (encode)
					*codecs = &sc_video_codecs_encode;
				else
					*codecs = &sc_video_codecs_decode_vcn0;
			}
		}
		return 0;
	case IP_VERSION(3, 0, 16):
	case IP_VERSION(3, 0, 2):
		if (encode)
			*codecs = &sc_video_codecs_encode;
		else
			*codecs = &sc_video_codecs_decode_vcn0;
		return 0;
	case IP_VERSION(3, 1, 1):
	case IP_VERSION(3, 1, 2):
		if (encode)
			*codecs = &sc_video_codecs_encode;
		else
			*codecs = &yc_video_codecs_decode;
		return 0;
	case IP_VERSION(3, 0, 33):
		if (encode)
			*codecs = &bg_video_codecs_encode;
		else
			*codecs = &bg_video_codecs_decode;
		return 0;
	case IP_VERSION(2, 0, 0):
	case IP_VERSION(2, 0, 2):
		if (encode)
			*codecs = &nv_video_codecs_encode;
		else
			*codecs = &nv_video_codecs_decode;
		return 0;
	default:
		return -EINVAL;
	}
}

static u32 nv_didt_rreg(struct amdgpu_device *adev, u32 reg)
{
	unsigned long flags, address, data;
	u32 r;

	address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);
	data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

	spin_lock_irqsave(&adev->reg.didt.lock, flags);
	WREG32(address, (reg));
	r = RREG32(data);
	spin_unlock_irqrestore(&adev->reg.didt.lock, flags);
	return r;
}

static void nv_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
{
	unsigned long flags, address, data;

	address = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_INDEX);
	data = SOC15_REG_OFFSET(GC, 0, mmDIDT_IND_DATA);

	spin_lock_irqsave(&adev->reg.didt.lock, flags);
	WREG32(address, (reg));
	WREG32(data, (v));
	spin_unlock_irqrestore(&adev->reg.didt.lock, flags);
}

static u32 nv_get_config_memsize(struct amdgpu_device *adev)
{
	return adev->nbio.funcs->get_memsize(adev);
}

Annotation

Implementation Notes