drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/psp_v12_0.c- Extension
.c- Size
- 8676 bytes
- Lines
- 296
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/firmware.hlinux/module.hamdgpu.hamdgpu_psp.hamdgpu_ucode.hsoc15_common.hpsp_v12_0.hmp/mp_12_0_0_offset.hmp/mp_12_0_0_sh_mask.hgc/gc_9_0_offset.hsdma0/sdma0_4_0_offset.hnbio/nbio_7_4_offset.h
Detected Declarations
function psp_v12_0_init_microcodefunction psp_v12_0_bootloader_load_sysdrvfunction psp_v12_0_bootloader_load_sosfunction psp_v12_0_ring_createfunction psp_v12_0_ring_stopfunction psp_v12_0_ring_destroyfunction psp_v12_0_mode1_resetfunction psp_v12_0_ring_get_wptrfunction psp_v12_0_ring_set_wptrfunction psp_v12_0_set_psp_funcs
Annotated Snippet
#include <linux/firmware.h>
#include <linux/module.h>
#include "amdgpu.h"
#include "amdgpu_psp.h"
#include "amdgpu_ucode.h"
#include "soc15_common.h"
#include "psp_v12_0.h"
#include "mp/mp_12_0_0_offset.h"
#include "mp/mp_12_0_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "sdma0/sdma0_4_0_offset.h"
#include "nbio/nbio_7_4_offset.h"
MODULE_FIRMWARE("amdgpu/renoir_asd.bin");
MODULE_FIRMWARE("amdgpu/renoir_ta.bin");
MODULE_FIRMWARE("amdgpu/green_sardine_asd.bin");
MODULE_FIRMWARE("amdgpu/green_sardine_ta.bin");
/* address block */
#define smnMP1_FIRMWARE_FLAGS 0x3010024
static int psp_v12_0_init_microcode(struct psp_context *psp)
{
struct amdgpu_device *adev = psp->adev;
char ucode_prefix[30];
int err = 0;
DRM_DEBUG("\n");
amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
err = psp_init_asd_microcode(psp, ucode_prefix);
if (err)
return err;
err = psp_init_ta_microcode(psp, ucode_prefix);
if (err)
return err;
/* only supported on renoir */
if (!(adev->apu_flags & AMD_APU_IS_RENOIR))
adev->psp.securedisplay_context.context.bin_desc.size_bytes = 0;
return 0;
}
static int psp_v12_0_bootloader_load_sysdrv(struct psp_context *psp)
{
int ret;
uint32_t psp_gfxdrv_command_reg = 0;
struct amdgpu_device *adev = psp->adev;
uint32_t sol_reg;
/* Check sOS sign of life register to confirm sys driver and sOS
* are already been loaded.
*/
sol_reg = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81);
if (sol_reg)
return 0;
/* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
0x80000000, 0x80000000, 0);
if (ret)
return ret;
/* Copy PSP System Driver binary to memory */
ret = psp_copy_fw(psp, psp->sys.start_addr, psp->sys.size_bytes);
if (ret)
return ret;
/* Provide the sys driver to bootloader */
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
(uint32_t)(psp->fw_pri_mc_addr >> 20));
psp_gfxdrv_command_reg = 1 << 16;
WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
psp_gfxdrv_command_reg);
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35),
0x80000000, 0x80000000, 0);
return ret;
}
static int psp_v12_0_bootloader_load_sos(struct psp_context *psp)
{
int ret;
unsigned int psp_gfxdrv_command_reg = 0;
struct amdgpu_device *adev = psp->adev;
uint32_t sol_reg;
Annotation
- Immediate include surface: `linux/firmware.h`, `linux/module.h`, `amdgpu.h`, `amdgpu_psp.h`, `amdgpu_ucode.h`, `soc15_common.h`, `psp_v12_0.h`, `mp/mp_12_0_0_offset.h`.
- Detected declarations: `function psp_v12_0_init_microcode`, `function psp_v12_0_bootloader_load_sysdrv`, `function psp_v12_0_bootloader_load_sos`, `function psp_v12_0_ring_create`, `function psp_v12_0_ring_stop`, `function psp_v12_0_ring_destroy`, `function psp_v12_0_mode1_reset`, `function psp_v12_0_ring_get_wptr`, `function psp_v12_0_ring_set_wptr`, `function psp_v12_0_set_psp_funcs`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.