drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c- Extension
.c- Size
- 22691 bytes
- Lines
- 797
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
smuio/smuio_11_0_0_offset.hsmuio/smuio_11_0_0_sh_mask.hsmu_v11_0_i2c.hamdgpu.hamdgpu_dpm.hsoc15_common.hdrm/drm_fixed.hdrm/drm_drv.hamdgpu_amdkfd.hlinux/i2c.hlinux/pci.h
Detected Declarations
function filesfunction smu_v11_0_i2c_enablefunction smu_v11_0_i2c_clear_statusfunction smu_v11_0_i2c_configurefunction smu_v11_0_i2c_set_clockfunction smu_v11_0_i2c_set_addressfunction smu_v11_0_i2c_poll_tx_statusfunction smu_v11_0_i2c_poll_rx_statusfunction smu_v11_0_i2c_transmitfunction smu_v11_0_i2c_receivefunction smu_v11_0_i2c_abortfunction smu_v11_0_i2c_activity_donefunction smu_v11_0_i2c_initfunction smu_v11_0_i2c_finifunction smu_v11_0_i2c_bus_lockfunction smu_v11_0_i2c_bus_unlockfunction smu_v11_0_i2c_read_datafunction smu_v11_0_i2c_write_datafunction lock_busfunction trylock_busfunction unlock_busfunction smu_v11_0_i2c_xferfunction changesfunction smu_v11_0_i2c_funcfunction smu_v11_0_i2c_control_initfunction smu_v11_0_i2c_control_finifunction smu_v11_0_i2c_test_bus
Annotated Snippet
if (time_after(jiffies, timeout_counter)) {
ret |= I2C_SW_TIMEOUT;
break;
}
reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
} while (REG_GET_FIELD(reg, CKSVII2C_IC_STATUS, TFE) == 0);
if (ret != I2C_OK)
return ret;
/* This only checks if NAK is received and transaction got aborted */
reg = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_INTR_STAT);
if (REG_GET_FIELD(reg, CKSVII2C_IC_INTR_STAT, R_TX_ABRT) == 1) {
reg_c_tx_abrt_source = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TX_ABRT_SOURCE);
drm_info(adev_to_drm(adev),
"TX was terminated, IC_TX_ABRT_SOURCE val is:%x",
reg_c_tx_abrt_source);
/* Check for stop due to NACK */
if (REG_GET_FIELD(reg_c_tx_abrt_source,
CKSVII2C_IC_TX_ABRT_SOURCE,
ABRT_TXDATA_NOACK) == 1) {
ret |= I2C_NAK_TXDATA_NOACK;
} else if (REG_GET_FIELD(reg_c_tx_abrt_source,
CKSVII2C_IC_TX_ABRT_SOURCE,
ABRT_7B_ADDR_NOACK) == 1) {
ret |= I2C_NAK_7B_ADDR_NOACK;
} else {
ret |= I2C_ABORT;
}
smu_v11_0_i2c_clear_status(control);
}
return ret;
}
static uint32_t smu_v11_0_i2c_poll_rx_status(struct i2c_adapter *control)
{
struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);
struct amdgpu_device *adev = smu_i2c->adev;
uint32_t ret = I2C_OK;
uint32_t reg_ic_status, reg_c_tx_abrt_source;
reg_c_tx_abrt_source = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_TX_ABRT_SOURCE);
/* If slave is not present */
if (REG_GET_FIELD(reg_c_tx_abrt_source,
CKSVII2C_IC_TX_ABRT_SOURCE,
ABRT_7B_ADDR_NOACK) == 1) {
ret |= I2C_NAK_7B_ADDR_NOACK;
smu_v11_0_i2c_clear_status(control);
} else { /* wait till some data is there in RXFIFO */
/* Poll for some byte in RXFIFO */
unsigned long timeout_counter = jiffies + msecs_to_jiffies(20);
do {
if (time_after(jiffies, timeout_counter)) {
ret |= I2C_SW_TIMEOUT;
break;
}
reg_ic_status = RREG32_SOC15(SMUIO, 0, mmCKSVII2C_IC_STATUS);
} while (REG_GET_FIELD(reg_ic_status, CKSVII2C_IC_STATUS, RFNE) == 0);
}
return ret;
}
/**
* smu_v11_0_i2c_transmit - Send a block of data over the I2C bus to a slave device.
*
* @control: I2C adapter reference
* @address: The I2C address of the slave device.
* @data: The data to transmit over the bus.
* @numbytes: The amount of data to transmit.
* @i2c_flag: Flags for transmission
*
* Returns 0 on success or error.
*/
static uint32_t smu_v11_0_i2c_transmit(struct i2c_adapter *control,
u16 address, u8 *data,
Annotation
- Immediate include surface: `smuio/smuio_11_0_0_offset.h`, `smuio/smuio_11_0_0_sh_mask.h`, `smu_v11_0_i2c.h`, `amdgpu.h`, `amdgpu_dpm.h`, `soc15_common.h`, `drm/drm_fixed.h`, `drm/drm_drv.h`.
- Detected declarations: `function files`, `function smu_v11_0_i2c_enable`, `function smu_v11_0_i2c_clear_status`, `function smu_v11_0_i2c_configure`, `function smu_v11_0_i2c_set_clock`, `function smu_v11_0_i2c_set_address`, `function smu_v11_0_i2c_poll_tx_status`, `function smu_v11_0_i2c_poll_rx_status`, `function smu_v11_0_i2c_transmit`, `function smu_v11_0_i2c_receive`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.