drivers/gpu/drm/amd/amdgpu/umc_v8_14.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/amdgpu/umc_v8_14.h

Extension

.h

Size

2062 bytes

Lines

52

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• soc15_common.h
• amdgpu.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __UMC_V8_14_H__
#define __UMC_V8_14_H__

#include "soc15_common.h"
#include "amdgpu.h"

/* number of umc channel instance with memory map register access */
#define UMC_V8_14_CHANNEL_INSTANCE_NUM		2
/* number of umc instance with memory map register access */
#define UMC_V8_14_UMC_INSTANCE_NUM(adev)		((adev)->umc.node_inst_num)

/* Total channel instances for all available umc nodes */
#define UMC_V8_14_TOTAL_CHANNEL_NUM(adev) \
	(UMC_V8_14_CHANNEL_INSTANCE_NUM * (adev)->gmc.num_umc)

/* UMC register per channel offset */
#define UMC_V8_14_PER_CHANNEL_OFFSET		0x400

#define UMC_V8_14_INST_DIST		0x40000

/* EccErrCnt max value */
#define UMC_V8_14_CE_CNT_MAX		0xffff
/* umc ce interrupt threshold */
#define UMC_V8_14_CE_INT_THRESHOLD		0xffff
/* umc ce count initial value */
#define UMC_V8_14_CE_CNT_INIT	(UMC_V8_14_CE_CNT_MAX - UMC_V8_14_CE_INT_THRESHOLD)

extern struct amdgpu_umc_ras umc_v8_14_ras;
#endif

Annotation

• Immediate include surface: `soc15_common.h`, `amdgpu.h`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.