drivers/gpu/drm/amd/amdgpu/vpe_6_1_fw_if.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/vpe_6_1_fw_if.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/vpe_6_1_fw_if.h
Extension
.h
Size
7911 bytes
Lines
219
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __VPE_6_1_FW_IF_H_
#define __VPE_6_1_FW_IF_H_

/****************
 * VPE OP Codes
 ****************/
enum VPE_CMD_OPCODE {
    VPE_CMD_OPCODE_NOP          = 0x0,
    VPE_CMD_OPCODE_VPE_DESC     = 0x1,
    VPE_CMD_OPCODE_PLANE_CFG    = 0x2,
    VPE_CMD_OPCODE_VPEP_CFG     = 0x3,
    VPE_CMD_OPCODE_INDIRECT     = 0x4,
    VPE_CMD_OPCODE_FENCE        = 0x5,
    VPE_CMD_OPCODE_TRAP         = 0x6,
    VPE_CMD_OPCODE_REG_WRITE    = 0x7,
    VPE_CMD_OPCODE_POLL_REGMEM  = 0x8,
    VPE_CMD_OPCODE_COND_EXE     = 0x9,
    VPE_CMD_OPCODE_ATOMIC       = 0xA,
    VPE_CMD_OPCODE_PRED_EXE     = 0xB,
    VPE_CMD_OPCODE_COLLAB_SYNC  = 0xC,
    VPE_CMD_OPCODE_TIMESTAMP    = 0xD
};

/** Generic Command Header
 * Generic Commands include:
 *  Noop, Fence, Trap,
 *  RegisterWrite, PollRegisterWriteMemory,
 *  SetLocalTimestamp, GetLocalTimestamp
 *  GetGlobalGPUTimestamp */
#define VPE_HEADER_SUB_OPCODE__SHIFT    8
#define VPE_HEADER_SUB_OPCODE_MASK      0x0000FF00
#define VPE_HEADER_OPCODE__SHIFT        0
#define VPE_HEADER_OPCODE_MASK          0x000000FF

#define VPE_CMD_HEADER(op, subop) \
    (((subop << VPE_HEADER_SUB_OPCODE__SHIFT) & VPE_HEADER_SUB_OPCODE_MASK) | \
     ((op << VPE_HEADER_OPCODE__SHIFT) & VPE_HEADER_OPCODE_MASK))


 /***************************
  * VPE NOP
  ***************************/
#define VPE_CMD_NOP_HEADER_COUNT__SHIFT    16
#define VPE_CMD_NOP_HEADER_COUNT_MASK      0x00003FFF

#define VPE_CMD_NOP_HEADER_COUNT(count) \
     (((count) & VPE_CMD_NOP_HEADER_COUNT_MASK) << VPE_CMD_NOP_HEADER_COUNT__SHIFT)

 /***************************
  * VPE Descriptor
  ***************************/
#define VPE_DESC_CD__SHIFT          16
#define VPE_DESC_CD_MASK            0x000F0000

#define VPE_DESC_CMD_HEADER(cd) \
    (VPE_CMD_HEADER(VPE_CMD_OPCODE_VPE_DESC, 0) | \
     (((cd) << VPE_DESC_CD__SHIFT) & VPE_DESC_CD_MASK))

 /***************************
  * VPE Plane Config
  ***************************/
enum VPE_PLANE_CFG_SUBOP {
    VPE_PLANE_CFG_SUBOP_1_TO_1 = 0x0,
    VPE_PLANE_CFG_SUBOP_2_TO_1 = 0x1,
    VPE_PLANE_CFG_SUBOP_2_TO_2 = 0x2
};

#define VPE_PLANE_CFG_ONE_PLANE     0
#define VPE_PLANE_CFG_TWO_PLANES    1

#define VPE_PLANE_CFG_NPS0__SHIFT   16
#define VPE_PLANE_CFG_NPS0_MASK     0x00030000

#define VPE_PLANE_CFG_NPD0__SHIFT   18
#define VPE_PLANE_CFG_NPD0_MASK     0x000C0000

#define VPE_PLANE_CFG_NPS1__SHIFT   20
#define VPE_PLANE_CFG_NPS1_MASK     0x00300000

#define VPE_PLANE_CFG_NPD1__SHIFT   22
#define VPE_PLANE_CFG_NPD1_MASK     0x00C00000

#define VPE_PLANE_CFG_TMZ__SHIFT    16
#define VPE_PLANE_CFG_TMZ_MASK      0x00010000

#define VPE_PLANE_CFG_SWIZZLE_MODE__SHIFT   3
#define VPE_PLANE_CFG_SWIZZLE_MODE_MASK     0x000000F8

#define VPE_PLANE_CFG_ROTATION__SHIFT       0
#define VPE_PLANE_CFG_ROTATION_MASK         0x00000003

Annotation

Implementation Notes