drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h- Extension
.h- Size
- 12555 bytes
- Lines
- 379
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/rwsem.hlinux/list.hlinux/mutex.hlinux/sched/mm.hkfd_priv.hkfd_mqd_manager.h
Detected Declarations
struct device_process_nodestruct device_queue_manager_opsstruct device_queue_manager_asic_opsstruct dqm_detect_hang_infostruct device_queue_managerfunction get_sh_mem_bases_32function get_sh_mem_bases_nybble_64function dqm_lockfunction dqm_unlockfunction read_sdma_queue_counterfunction update_dqm_wait_times
Annotated Snippet
struct device_process_node {
struct qcm_process_device *qpd;
struct list_head list;
};
union SQ_CMD_BITS {
struct {
uint32_t cmd:3;
uint32_t:1;
uint32_t mode:3;
uint32_t check_vmid:1;
uint32_t trap_id:3;
uint32_t:5;
uint32_t wave_id:4;
uint32_t simd_id:2;
uint32_t:2;
uint32_t queue_id:3;
uint32_t:1;
uint32_t vm_id:4;
} bitfields, bits;
uint32_t u32All;
signed int i32All;
float f32All;
};
union GRBM_GFX_INDEX_BITS {
struct {
uint32_t instance_index:8;
uint32_t sh_index:8;
uint32_t se_index:8;
uint32_t:5;
uint32_t sh_broadcast_writes:1;
uint32_t instance_broadcast_writes:1;
uint32_t se_broadcast_writes:1;
} bitfields, bits;
uint32_t u32All;
signed int i32All;
float f32All;
};
/**
* struct device_queue_manager_ops
*
* @create_queue: Queue creation routine.
*
* @destroy_queue: Queue destruction routine.
*
* @update_queue: Queue update routine.
*
* @exeute_queues: Dispatches the queues list to the H/W.
*
* @register_process: This routine associates a specific process with device.
*
* @unregister_process: destroys the associations between process to device.
*
* @initialize: Initializes the pipelines and memory module for that device.
*
* @start: Initializes the resources/modules the device needs for queues
* execution. This function is called on device initialization and after the
* system woke up after suspension.
*
* @stop: This routine stops execution of all the active queue running on the
* H/W and basically this function called on system suspend.
*
* @uninitialize: Destroys all the device queue manager resources allocated in
* initialize routine.
*
* @halt: This routine unmaps queues from runlist and set halt status to true
* so no more queues will be mapped to runlist until unhalt.
*
* @unhalt: This routine unset halt status to flase and maps queues back to
* runlist.
*
* @create_kernel_queue: Creates kernel queue. Used for debug queue.
*
* @destroy_kernel_queue: Destroys kernel queue. Used for debug queue.
*
* @set_cache_memory_policy: Sets memory policy (cached/ non cached) for the
* memory apertures.
*
* @process_termination: Clears all process queues belongs to that device.
*
* @evict_process_queues: Evict all active queues of a process
*
* @restore_process_queues: Restore all evicted queues of a process
*
* @get_wave_state: Retrieves context save state and optionally copies the
* control stack, if kept in the MQD, to the given userspace address.
*
* @reset_queues: reset queues which consume RAS poison
Annotation
- Immediate include surface: `linux/rwsem.h`, `linux/list.h`, `linux/mutex.h`, `linux/sched/mm.h`, `kfd_priv.h`, `kfd_mqd_manager.h`.
- Detected declarations: `struct device_process_node`, `struct device_queue_manager_ops`, `struct device_queue_manager_asic_ops`, `struct dqm_detect_hang_info`, `struct device_queue_manager`, `function get_sh_mem_bases_32`, `function get_sh_mem_bases_nybble_64`, `function dqm_lock`, `function dqm_unlock`, `function read_sdma_queue_counter`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.