drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v11.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v11.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v11.c
Extension
.c
Size
3347 bytes
Lines
91
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "kfd_device_queue_manager.h"
#include "gc/gc_11_0_0_offset.h"
#include "gc/gc_11_0_0_sh_mask.h"
#include "soc21_enum.h"

static int update_qpd_v11(struct device_queue_manager *dqm,
			 struct qcm_process_device *qpd);
static void init_sdma_vm_v11(struct device_queue_manager *dqm, struct queue *q,
			    struct qcm_process_device *qpd);
static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
				   struct qcm_process_device *qpd,
				   enum cache_policy default_policy,
				   enum cache_policy alternate_policy,
				   void __user *alternate_aperture_base,
				   uint64_t alternate_aperture_size,
				   u32 misc_process_properties);

void device_queue_manager_init_v11(
	struct device_queue_manager_asic_ops *asic_ops)
{
	asic_ops->set_cache_memory_policy = set_cache_memory_policy_v11;
	asic_ops->update_qpd = update_qpd_v11;
	asic_ops->init_sdma_vm = init_sdma_vm_v11;
	asic_ops->mqd_manager_init = mqd_manager_init_v11;
}

static uint32_t compute_sh_mem_bases_64bit(struct kfd_process_device *pdd)
{
	uint32_t shared_base = pdd->lds_base >> 48;
	uint32_t private_base = pdd->scratch_base >> 48;

	return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) |
		private_base;
}

static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
				   struct qcm_process_device *qpd,
				   enum cache_policy default_policy,
				   enum cache_policy alternate_policy,
				   void __user *alternate_aperture_base,
				   uint64_t alternate_aperture_size,
				   u32 misc_process_properties)
{
	qpd->sh_mem_config = (SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
			      SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |
			      (3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT);

	qpd->sh_mem_ape1_limit = 0;
	qpd->sh_mem_ape1_base = 0;
	qpd->sh_mem_bases = compute_sh_mem_bases_64bit(qpd_to_pdd(qpd));

	pr_debug("sh_mem_bases 0x%X\n", qpd->sh_mem_bases);
	return true;
}

static int update_qpd_v11(struct device_queue_manager *dqm,
			 struct qcm_process_device *qpd)
{
	return 0;
}

static void init_sdma_vm_v11(struct device_queue_manager *dqm, struct queue *q,
			    struct qcm_process_device *qpd)
{
	/* Not needed on SDMAv4 onwards any more */
	q->properties.sdma_vm_addr = 0;
}

Annotation

Implementation Notes