drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdkfd/kfd_int_process_v9.c
Extension
.c
Size
21639 bytes
Lines
611
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (amdgpu_ip_version(dev->adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3)) {
			/* driver mode-2 for gfx poison is only supported by
			 * pmfw 0x00557300 and onwards */
			if (dev->adev->pm.fw_version < 0x00557300)
				reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
			else
				reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		} else if (amdgpu_ip_version(dev->adev, GC_HWIP, 0) == IP_VERSION(9, 4, 4)) {
			/* driver mode-2 for gfx poison is only supported by
			 * pmfw 0x05550C00 and onwards */
			if (dev->adev->pm.fw_version < 0x05550C00)
				reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
			else
				reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		} else {
			reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		}
		amdgpu_ras_set_err_poison(dev->adev, AMDGPU_RAS_BLOCK__GFX);
		break;
	case SOC15_IH_CLIENTID_VMC:
	case SOC15_IH_CLIENTID_VMC1:
		block = AMDGPU_RAS_BLOCK__MMHUB;
		reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
		break;
	case SOC15_IH_CLIENTID_SDMA0:
	case SOC15_IH_CLIENTID_SDMA1:
	case SOC15_IH_CLIENTID_SDMA2:
	case SOC15_IH_CLIENTID_SDMA3:
	case SOC15_IH_CLIENTID_SDMA4:
		block = AMDGPU_RAS_BLOCK__SDMA;
		if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2)) {
			/* driver mode-2 for gfx poison is only supported by
			 * pmfw 0x00557300 and onwards */
			if (dev->adev->pm.fw_version < 0x00557300)
				reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
			else
				reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		} else if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) {
			/* driver mode-2 for gfx poison is only supported by
			 * pmfw 0x05550C00 and onwards */
			if (dev->adev->pm.fw_version < 0x05550C00)
				reset = AMDGPU_RAS_GPU_RESET_MODE1_RESET;
			else
				reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		} else {
			reset = AMDGPU_RAS_GPU_RESET_MODE2_RESET;
		}
		amdgpu_ras_set_err_poison(dev->adev, AMDGPU_RAS_BLOCK__SDMA);
		break;
	default:
		dev_warn(dev->adev->dev,
			 "client %d does not support poison consumption\n", client_id);
		return;
	}

	ret = amdgpu_ras_mark_ras_event(dev->adev, type);
	if (ret)
		return;

	kfd_signal_poison_consumed_event(dev, pasid);

	if (amdgpu_uniras_enabled(dev->adev))
		event_id = amdgpu_ras_mgr_gen_ras_event_seqno(dev->adev,
					RAS_SEQNO_TYPE_POISON_CONSUMPTION);
	else
		event_id = amdgpu_ras_acquire_event_id(dev->adev, type);

	RAS_EVENT_LOG(dev->adev, event_id,
		      "poison is consumed by client %d, kick off gpu reset flow\n", client_id);

	amdgpu_amdkfd_ras_pasid_poison_consumption_handler(dev->adev,
		block, pasid, NULL, NULL, reset);
}

static bool context_id_expected(struct kfd_dev *dev)
{
	switch (KFD_GC_VERSION(dev)) {
	case IP_VERSION(9, 0, 1):
		return dev->mec_fw_version >= 0x817a;
	case IP_VERSION(9, 1, 0):
	case IP_VERSION(9, 2, 1):
	case IP_VERSION(9, 2, 2):
	case IP_VERSION(9, 3, 0):
	case IP_VERSION(9, 4, 0):
		return dev->mec_fw_version >= 0x17a;
	default:
		/* Other GFXv9 and later GPUs always sent valid context IDs
		 * on legitimate events
		 */
		return KFD_GC_VERSION(dev) >= IP_VERSION(9, 4, 1);

Annotation

Implementation Notes