drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/amdkfd/kfd_pm4_headers_ai.h

Extension

.h

Size

15728 bytes

Lines

662

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct pm4_mes_set_resources
• struct pm4_mes_runlist
• struct pm4_mes_map_process
• struct PM4_MES_MAP_PROCESS_VM
• struct pm4_mes_map_queues
• struct pm4_mes_query_status
• struct pm4_mes_unmap_queues
• struct pm4_mec_release_mem
• struct pm4_mec_write_data_mmio
• enum mes_set_resources_queue_type_enum
• enum mes_map_queues_queue_sel_enum
• enum mes_map_queues_queue_type_enum
• enum mes_map_queues_engine_sel_enum
• enum mes_map_queues_extended_engine_sel_enum
• enum mes_query_status_interrupt_sel_enum
• enum mes_query_status_command_enum
• enum mes_query_status_engine_sel_enum
• enum mes_unmap_queues_action_enum
• enum mes_unmap_queues_queue_sel_enum
• enum mes_unmap_queues_engine_sel_enum
• enum mes_unmap_queues_extended_engine_sel_enum
• enum mec_release_mem_event_index_enum
• enum mec_release_mem_cache_policy_enum
• enum mec_release_mem_pq_exe_status_enum
• enum mec_release_mem_dst_sel_enum
• enum mec_release_mem_int_sel_enum
• enum mec_release_mem_data_sel_enum
• enum WRITE_DATA_dst_sel_enum
• enum WRITE_DATA_addr_incr_enum
• enum WRITE_DATA_wr_confirm_enum
• enum WRITE_DATA_cache_policy_enum

Annotated Snippet

struct pm4_mes_set_resources {
	union {
		union PM4_MES_TYPE_3_HEADER	header;		/* header */
		uint32_t			ordinal1;
	};

	union {
		struct {
			uint32_t vmid_mask:16;
			uint32_t unmap_latency:8;
			uint32_t reserved1:4;
			uint32_t enb_xnack_retry_disable_check:1;
			enum mes_set_resources_queue_type_enum queue_type:3;
		} bitfields2;
		uint32_t ordinal2;
	};

	uint32_t queue_mask_lo;
	uint32_t queue_mask_hi;
	uint32_t gws_mask_lo;
	uint32_t gws_mask_hi;

	union {
		struct {
			uint32_t oac_mask:16;
			uint32_t reserved2:16;
		} bitfields7;
		uint32_t ordinal7;
	};

	union {
		struct {
		uint32_t gds_heap_base:10;
		uint32_t reserved3:1;
		uint32_t gds_heap_size:10;
		uint32_t reserved4:11;
		} bitfields8;
		uint32_t ordinal8;
	};

};
#endif

/*--------------------MES_RUN_LIST--------------------*/

#ifndef PM4_MES_RUN_LIST_DEFINED
#define PM4_MES_RUN_LIST_DEFINED

struct pm4_mes_runlist {
	union {
		union PM4_MES_TYPE_3_HEADER header; /* header */
		uint32_t ordinal1;
	};

	union {
		struct {
			uint32_t reserved1:2;
			uint32_t ib_base_lo:30;
		} bitfields2;
		uint32_t ordinal2;
	};

	uint32_t ib_base_hi;

	union {
		struct {
			uint32_t ib_size:20;
			uint32_t chain:1;
			uint32_t offload_polling:1;
			uint32_t chained_runlist_idle_disable:1;
			uint32_t valid:1;
			uint32_t process_cnt:4;
			uint32_t reserved3:4;
		} bitfields4;
		uint32_t ordinal4;
	};

};
#endif

/*--------------------MES_MAP_PROCESS--------------------*/

#ifndef PM4_MES_MAP_PROCESS_DEFINED
#define PM4_MES_MAP_PROCESS_DEFINED

struct pm4_mes_map_process {
	union {
		union PM4_MES_TYPE_3_HEADER header;	/* header */
		uint32_t ordinal1;
	};

Annotation

• Detected declarations: `struct pm4_mes_set_resources`, `struct pm4_mes_runlist`, `struct pm4_mes_map_process`, `struct PM4_MES_MAP_PROCESS_VM`, `struct pm4_mes_map_queues`, `struct pm4_mes_query_status`, `struct pm4_mes_unmap_queues`, `struct pm4_mec_release_mem`, `struct pm4_mec_write_data_mmio`, `enum mes_set_resources_queue_type_enum`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.