drivers/gpu/drm/amd/display/dc/bios/command_table.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/bios/command_table.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/bios/command_table.c
Extension
.c
Size
81877 bytes
Lines
2694
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (cntl->engine_id) {
		case ENGINE_ID_DIGA:
			if (cmd_tbl->encoder_control_dig1 != NULL)
				result =
					cmd_tbl->encoder_control_dig1(bp, cntl);
			break;
		case ENGINE_ID_DIGB:
			if (cmd_tbl->encoder_control_dig2 != NULL)
				result =
					cmd_tbl->encoder_control_dig2(bp, cntl);
			break;

		default:
			break;
		}

	return result;
}

static enum bp_result encoder_control_dig1_v1(
	struct bios_parser *bp,
	struct bp_encoder_control *cntl)
{
	enum bp_result result = BP_RESULT_FAILURE;
	DIG_ENCODER_CONTROL_PARAMETERS_V2 params = {0};

	bp->cmd_helper->assign_control_parameter(bp->cmd_helper, cntl, &params);

	if (EXEC_BIOS_CMD_TABLE(DIG1EncoderControl, params))
		result = BP_RESULT_OK;

	return result;
}

static enum bp_result encoder_control_dig2_v1(
	struct bios_parser *bp,
	struct bp_encoder_control *cntl)
{
	enum bp_result result = BP_RESULT_FAILURE;
	DIG_ENCODER_CONTROL_PARAMETERS_V2 params = {0};

	bp->cmd_helper->assign_control_parameter(bp->cmd_helper, cntl, &params);

	if (EXEC_BIOS_CMD_TABLE(DIG2EncoderControl, params))
		result = BP_RESULT_OK;

	return result;
}

static uint8_t dc_color_depth_to_atom(enum dc_color_depth color_depth)
{
	switch (color_depth) {
	case COLOR_DEPTH_UNDEFINED:
		return PANEL_BPC_UNDEFINE;
	case COLOR_DEPTH_666:
		return PANEL_6BIT_PER_COLOR;
	default:
	case COLOR_DEPTH_888:
		return PANEL_8BIT_PER_COLOR;
	case COLOR_DEPTH_101010:
		return PANEL_10BIT_PER_COLOR;
	case COLOR_DEPTH_121212:
		return PANEL_12BIT_PER_COLOR;
	case COLOR_DEPTH_141414:
		dm_error("14-bit color not supported by ATOMBIOS\n");
		return PANEL_BPC_UNDEFINE;
	case COLOR_DEPTH_161616:
		return PANEL_16BIT_PER_COLOR;
	}
}

static enum bp_result encoder_control_digx_v3(
	struct bios_parser *bp,
	struct bp_encoder_control *cntl)
{
	enum bp_result result = BP_RESULT_FAILURE;
	DIG_ENCODER_CONTROL_PARAMETERS_V3 params = {0};

	if (LANE_COUNT_FOUR < cntl->lanes_number)
		params.acConfig.ucDPLinkRate = 1; /* dual link 2.7GHz */
	else
		params.acConfig.ucDPLinkRate = 0; /* single link 1.62GHz */

	params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);

	/* We need to convert from KHz units into 10KHz units */
	params.ucAction = bp->cmd_helper->encoder_action_to_atom(cntl->action);
	params.usPixelClock = cpu_to_le16((uint16_t)(cntl->pixel_clock / 10));
	params.ucEncoderMode =
			(uint8_t)bp->cmd_helper->encoder_mode_bp_to_atom(

Annotation

Implementation Notes