drivers/gpu/drm/amd/display/dc/bios/command_table.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/display/dc/bios/command_table.h

Extension

.h

Size

3681 bytes

Lines

106

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• struct bios_parser
• struct bp_encoder_control
• struct cmd_tbl

Annotated Snippet

struct cmd_tbl {
	enum bp_result (*dig_encoder_control)(
		struct bios_parser *bp,
		struct bp_encoder_control *control);
	enum bp_result (*encoder_control_dig1)(
		struct bios_parser *bp,
		struct bp_encoder_control *control);
	enum bp_result (*encoder_control_dig2)(
		struct bios_parser *bp,
		struct bp_encoder_control *control);
	enum bp_result (*transmitter_control)(
		struct bios_parser *bp,
		struct bp_transmitter_control *control);
	enum bp_result (*set_pixel_clock)(
		struct bios_parser *bp,
		struct bp_pixel_clock_parameters *bp_params);
	enum bp_result (*enable_spread_spectrum_on_ppll)(
		struct bios_parser *bp,
		struct bp_spread_spectrum_parameters *bp_params,
		bool enable);
	enum bp_result (*adjust_display_pll)(
		struct bios_parser *bp,
		struct bp_adjust_pixel_clock_parameters *bp_params);
	enum bp_result (*select_crtc_source)(
		struct bios_parser *bp,
		struct bp_crtc_source_select *bp_params);
	enum bp_result (*dac1_encoder_control)(
		struct bios_parser *bp,
		enum bp_encoder_control_action action,
		uint32_t pixel_clock,
		uint8_t dac_standard);
	enum bp_result (*dac2_encoder_control)(
		struct bios_parser *bp,
		enum bp_encoder_control_action action,
		uint32_t pixel_clock,
		uint8_t dac_standard);
	enum bp_result (*dac1_output_control)(
		struct bios_parser *bp,
		bool enable);
	enum bp_result (*dac2_output_control)(
		struct bios_parser *bp,
		bool enable);
	enum bp_result (*dac_load_detection)(
		struct bios_parser *bp,
		struct bp_load_detection_parameters *bp_params);
	enum bp_result (*set_crtc_timing)(
		struct bios_parser *bp,
		struct bp_hw_crtc_timing_parameters *bp_params);
	enum bp_result (*enable_crtc)(
		struct bios_parser *bp,
		enum controller_id controller_id,
		bool enable);
	enum bp_result (*enable_crtc_mem_req)(
		struct bios_parser *bp,
		enum controller_id controller_id,
		bool enable);
	enum bp_result (*program_clock)(
		struct bios_parser *bp,
		struct bp_pixel_clock_parameters *bp_params);
	enum bp_result (*external_encoder_control)(
			struct bios_parser *bp,
			struct bp_external_encoder_control *cntl);
	enum bp_result (*enable_disp_power_gating)(
		struct bios_parser *bp,
		enum controller_id crtc_id,
		enum bp_pipe_control_action action);
	enum bp_result (*set_dce_clock)(
		struct bios_parser *bp,
		struct bp_set_dce_clock_parameters *bp_params);
};

void dal_bios_parser_init_cmd_tbl(struct bios_parser *bp);

#endif

Annotation

• Detected declarations: `struct bios_parser`, `struct bp_encoder_control`, `struct cmd_tbl`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.