drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h- Extension
.h- Size
- 2823 bytes
- Lines
- 67
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dce80/command_table_helper_dce80.hdce110/command_table_helper_dce110.hdce112/command_table_helper_dce112.h
Detected Declarations
struct _DIG_ENCODER_CONTROL_PARAMETERS_V2struct command_table_helper
Annotated Snippet
struct command_table_helper {
bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
uint8_t (*encoder_action_to_atom)(
enum bp_encoder_control_action action);
uint32_t (*encoder_mode_bp_to_atom)(enum signal_type s,
bool enable_dp_audio);
bool (*engine_bp_to_atom)(enum engine_id engine_id,
uint32_t *atom_engine_id);
void (*assign_control_parameter)(
const struct command_table_helper *h,
struct bp_encoder_control *control,
struct _DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param);
bool (*clock_source_id_to_atom)(enum clock_source_id id,
uint32_t *atom_pll_id);
bool (*clock_source_id_to_ref_clk_src)(
enum clock_source_id id,
uint32_t *ref_clk_src_id);
uint8_t (*transmitter_bp_to_atom)(enum transmitter t);
uint8_t (*encoder_id_to_atom)(enum encoder_id id);
uint8_t (*clock_source_id_to_atom_phy_clk_src_id)(
enum clock_source_id id);
uint8_t (*signal_type_to_atom_dig_mode)(enum signal_type s);
uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id);
uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id);
uint8_t (*phy_id_to_atom)(enum transmitter t);
uint8_t (*disp_power_gating_action_to_atom)(
enum bp_pipe_control_action action);
bool (*dc_clock_type_to_atom)(enum bp_dce_clock_type id,
uint32_t *atom_clock_type);
uint8_t (*transmitter_color_depth_to_atom)(enum transmitter_color_depth id);
};
#endif
Annotation
- Immediate include surface: `dce80/command_table_helper_dce80.h`, `dce110/command_table_helper_dce110.h`, `dce112/command_table_helper_dce112.h`.
- Detected declarations: `struct _DIG_ENCODER_CONTROL_PARAMETERS_V2`, `struct command_table_helper`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.