drivers/gpu/drm/amd/display/dc/core/dc_resource.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/core/dc_resource.c- Extension
.c- Size
- 193712 bytes
- Lines
- 6033
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dm_services.hresource.hinclude/irq_service_interface.hlink_encoder.hstream_encoder.hopp.htiming_generator.htransform.hdccg.hdchubbub.hdpp.hcore_types.hset_mode_types.hdio/virtual/virtual_stream_encoder.hdpcd_defs.hlink_enc_cfg.hlink_service.hclk_mgr.hdc_state_priv.hdc_stream_priv.hlink/hwss/link_hwss_virtual.hlink/hwss/link_hwss_dio.hlink/hwss/link_hwss_dpia.hlink/hwss/link_hwss_hpo_dp.hlink/hwss/link_hwss_dio_fixed_vs_pe_retimer.hlink/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.hdce60/dce60_resource.hdce80/dce80_resource.hdce100/dce100_resource.hdce110/dce110_resource.hdce112/dce112_resource.hdce120/dce120_resource.h
Detected Declarations
function filesfunction start_new_topology_snapshotfunction resource_parse_asic_idfunction dc_destroy_resource_poolfunction update_num_audiofunction resource_constructfunction find_matching_clock_sourcefunction resource_unreference_clock_sourcefunction resource_reference_clock_sourcefunction resource_get_clock_source_referencefunction resource_are_vblanks_synchronizablefunction resource_are_streams_timing_synchronizablefunction is_dp_and_hdmi_sharablefunction is_sharable_clk_srcfunction convert_pixel_format_to_dalsurfacefunction get_vp_scan_directionfunction intersect_recfunction shift_recfunction calculate_plane_rec_in_timing_activefunction calculate_mpc_slice_in_timing_activefunction onefunction calculate_adjust_recout_for_visual_confirmfunction reverse_adjust_recout_for_visual_confirmfunction adjust_recout_for_visual_confirmfunction calculate_recoutfunction calculate_scaling_ratiosfunction calculate_init_and_vpfunction calculate_inits_and_viewportsfunction convert_dp_to_controller_test_patternfunction convert_dp_to_controller_color_spacefunction resource_build_test_pattern_paramsfunction resource_build_scaling_paramsfunction resource_can_pipe_disable_cursorfunction resource_build_scaling_params_for_contextfunction resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_masterfunction resource_find_free_pipe_used_in_cur_mpc_blending_treefunction recource_find_free_pipe_not_used_in_cur_res_ctxfunction recource_find_free_pipe_used_as_otg_master_in_cur_res_ctxfunction resource_find_free_pipe_used_as_cur_sec_dppfunction resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combinefunction resource_find_any_free_pipefunction resource_is_pipe_typefunction resource_get_opp_heads_for_otg_masterfunction resource_get_dpp_pipes_for_opp_headfunction resource_get_dpp_pipes_for_planefunction resource_get_mpc_slice_indexfunction resource_get_mpc_slice_countfunction resource_get_odm_slice_count
Annotated Snippet
ASIC_REV_IS_FIJI_P(asic_id.hw_internal_rev)) {
dc_version = DCE_VERSION_10_0;
break;
}
if (ASIC_REV_IS_POLARIS10_P(asic_id.hw_internal_rev) ||
ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev) ||
ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
dc_version = DCE_VERSION_11_2;
}
if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev))
dc_version = DCE_VERSION_11_22;
break;
case FAMILY_AI:
if (ASICREV_IS_VEGA20_P(asic_id.hw_internal_rev))
dc_version = DCE_VERSION_12_1;
else
dc_version = DCE_VERSION_12_0;
break;
case FAMILY_RV:
dc_version = DCN_VERSION_1_0;
if (ASICREV_IS_RAVEN2(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_1_01;
if (ASICREV_IS_RENOIR(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_2_1;
if (ASICREV_IS_GREEN_SARDINE(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_2_1;
break;
case FAMILY_NV:
dc_version = DCN_VERSION_2_0;
if (asic_id.chip_id == DEVICE_ID_NV_13FE ||
asic_id.chip_id == DEVICE_ID_NV_143F ||
asic_id.chip_id == DEVICE_ID_NV_13F9 ||
asic_id.chip_id == DEVICE_ID_NV_13FA ||
asic_id.chip_id == DEVICE_ID_NV_13FB ||
asic_id.chip_id == DEVICE_ID_NV_13FC ||
asic_id.chip_id == DEVICE_ID_NV_13DB) {
dc_version = DCN_VERSION_2_01;
break;
}
if (ASICREV_IS_SIENNA_CICHLID_P(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_0;
if (ASICREV_IS_DIMGREY_CAVEFISH_P(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_02;
if (ASICREV_IS_BEIGE_GOBY_P(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_03;
break;
case FAMILY_VGH:
dc_version = DCN_VERSION_3_01;
break;
case FAMILY_YELLOW_CARP:
if (ASICREV_IS_YELLOW_CARP(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_1;
break;
case AMDGPU_FAMILY_GC_10_3_6:
if (ASICREV_IS_GC_10_3_6(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_15;
break;
case AMDGPU_FAMILY_GC_10_3_7:
if (ASICREV_IS_GC_10_3_7(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_16;
break;
case AMDGPU_FAMILY_GC_11_0_0:
dc_version = DCN_VERSION_3_2;
if (ASICREV_IS_GC_11_0_2(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_21;
break;
case AMDGPU_FAMILY_GC_11_0_1:
dc_version = DCN_VERSION_3_14;
break;
case AMDGPU_FAMILY_GC_11_5_0:
dc_version = DCN_VERSION_3_5;
if (ASICREV_IS_DCN4A_SOC_VAR_B(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_4_2B;
if (ASICREV_IS_GC_11_0_4(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_51;
if (ASICREV_IS_DCN36(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_3_6;
break;
case AMDGPU_FAMILY_GC_12_0_0:
if (ASICREV_IS_GC_12_0_1_A0(asic_id.hw_internal_rev) ||
ASICREV_IS_GC_12_0_0_A0(asic_id.hw_internal_rev))
dc_version = DCN_VERSION_4_01;
break;
case AMDGPU_FAMILY_GC_11_5_4:
dc_version = DCN_VERSION_4_2;
break;
default:
Annotation
- Immediate include surface: `dm_services.h`, `resource.h`, `include/irq_service_interface.h`, `link_encoder.h`, `stream_encoder.h`, `opp.h`, `timing_generator.h`, `transform.h`.
- Detected declarations: `function files`, `function start_new_topology_snapshot`, `function resource_parse_asic_id`, `function dc_destroy_resource_pool`, `function update_num_audio`, `function resource_construct`, `function find_matching_clock_source`, `function resource_unreference_clock_source`, `function resource_reference_clock_source`, `function resource_get_clock_source_reference`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.