drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dce/dce_abm.h- Extension
.h- Size
- 17072 bytes
- Lines
- 451
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
abm.h
Detected Declarations
struct dce_abm_shiftstruct dce_abm_maskstruct dce_abm_registersstruct dce_abm
Annotated Snippet
struct dce_abm_shift {
ABM_REG_FIELD_LIST(uint8_t);
};
struct dce_abm_mask {
ABM_REG_FIELD_LIST(uint32_t);
};
struct dce_abm_registers {
uint32_t DC_ABM1_HG_SAMPLE_RATE;
uint32_t DC_ABM1_LS_SAMPLE_RATE;
uint32_t BL1_PWM_BL_UPDATE_SAMPLE_RATE;
uint32_t DC_ABM1_HG_MISC_CTRL;
uint32_t DC_ABM1_IPCSC_COEFF_SEL;
uint32_t BL1_PWM_CURRENT_ABM_LEVEL;
uint32_t BL1_PWM_TARGET_ABM_LEVEL;
uint32_t BL1_PWM_USER_LEVEL;
uint32_t DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES;
uint32_t DC_ABM1_HGLS_REG_READ_PROGRESS;
uint32_t DC_ABM1_ACE_OFFSET_SLOPE_0;
uint32_t DC_ABM1_ACE_OFFSET_SLOPE_DATA;
uint32_t DC_ABM1_ACE_PWL_CNTL;
uint32_t DC_ABM1_HG_BIN_33_40_SHIFT_INDEX;
uint32_t DC_ABM1_HG_BIN_33_64_SHIFT_FLAG;
uint32_t DC_ABM1_HG_BIN_41_48_SHIFT_INDEX;
uint32_t DC_ABM1_HG_BIN_49_56_SHIFT_INDEX;
uint32_t DC_ABM1_HG_BIN_57_64_SHIFT_INDEX;
uint32_t DC_ABM1_HG_RESULT_DATA;
uint32_t DC_ABM1_HG_RESULT_INDEX;
uint32_t DC_ABM1_ACE_THRES_DATA;
uint32_t DC_ABM1_ACE_THRES_12;
uint32_t MASTER_COMM_CNTL_REG;
uint32_t MASTER_COMM_CMD_REG;
uint32_t MASTER_COMM_DATA_REG1;
uint32_t BIOS_SCRATCH_2;
};
struct dce_abm {
struct abm base;
const struct dce_abm_registers *regs;
const struct dce_abm_shift *abm_shift;
const struct dce_abm_mask *abm_mask;
};
struct abm *dce_abm_create(
struct dc_context *ctx,
const struct dce_abm_registers *regs,
const struct dce_abm_shift *abm_shift,
const struct dce_abm_mask *abm_mask);
void dce_abm_destroy(struct abm **abm);
#endif /* _DCE_ABM_H_ */
Annotation
- Immediate include surface: `abm.h`.
- Detected declarations: `struct dce_abm_shift`, `struct dce_abm_mask`, `struct dce_abm_registers`, `struct dce_abm`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.