drivers/gpu/drm/amd/display/dc/dce/dce_audio.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
Extension
.h
Size
6358 bytes
Lines
174
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dce_audio_registers {
	uint32_t AZALIA_F0_CODEC_ENDPOINT_INDEX;
	uint32_t AZALIA_F0_CODEC_ENDPOINT_DATA;

	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS;
	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES;
	uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES;

	uint32_t DCCG_AUDIO_DTO_SOURCE;
	uint32_t DCCG_AUDIO_DTO0_MODULE;
	uint32_t DCCG_AUDIO_DTO0_PHASE;
	uint32_t DCCG_AUDIO_DTO1_MODULE;
	uint32_t DCCG_AUDIO_DTO1_PHASE;

	uint32_t AUDIO_RATE_CAPABILITIES;
};

struct dce_audio_shift {
	uint8_t AZALIA_ENDPOINT_REG_INDEX;
	uint8_t AZALIA_ENDPOINT_REG_DATA;

	uint8_t AUDIO_RATE_CAPABILITIES;
	uint8_t CLKSTOP;
	uint8_t EPSS;

	uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
	uint8_t DCCG_AUDIO_DTO_SEL;
	uint8_t DCCG_AUDIO_DTO0_MODULE;
	uint8_t DCCG_AUDIO_DTO0_PHASE;
	uint8_t DCCG_AUDIO_DTO1_MODULE;
	uint8_t DCCG_AUDIO_DTO1_PHASE;
	uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
	uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
	uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
	uint32_t CLOCK_GATING_DISABLE;
};

struct dce_audio_mask {
	uint32_t AZALIA_ENDPOINT_REG_INDEX;
	uint32_t AZALIA_ENDPOINT_REG_DATA;

	uint32_t AUDIO_RATE_CAPABILITIES;
	uint32_t CLKSTOP;
	uint32_t EPSS;

	uint32_t DCCG_AUDIO_DTO0_SOURCE_SEL;
	uint32_t DCCG_AUDIO_DTO_SEL;
	uint32_t DCCG_AUDIO_DTO0_MODULE;
	uint32_t DCCG_AUDIO_DTO0_PHASE;
	uint32_t DCCG_AUDIO_DTO1_MODULE;
	uint32_t DCCG_AUDIO_DTO1_PHASE;
	uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
	uint32_t DCCG_AUDIO_DTO0_USE_512FBR_DTO;
	uint32_t DCCG_AUDIO_DTO1_USE_512FBR_DTO;
	uint32_t CLOCK_GATING_DISABLE;

};

struct dce_audio {
	struct audio base;
	const struct dce_audio_registers *regs;
	const struct dce_audio_shift *shifts;
	const struct dce_audio_mask *masks;
};

struct audio *dce_audio_create(
		struct dc_context *ctx,
		unsigned int inst,
		const struct dce_audio_registers *reg,
		const struct dce_audio_shift *shifts,
		const struct dce_audio_mask *masks);

void dce_aud_destroy(struct audio **audio);

void dce_aud_hw_init(struct audio *audio);

void dce_aud_az_enable(struct audio *audio);
void dce_aud_az_disable(struct audio *audio);
void dce_aud_az_disable_hbr_audio(struct audio *audio);

void dce_aud_az_configure(struct audio *audio,
	enum signal_type signal,
	const struct audio_crtc_info *crtc_info,
	const struct audio_info *audio_info,
	const struct audio_dp_link_info *dp_link_info);

void dce_aud_wall_dto_setup(struct audio *audio,
	enum signal_type signal,
	const struct audio_crtc_info *crtc_info,
	const struct audio_pll_info *pll_info);

Annotation

Implementation Notes