drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h- Extension
.h- Size
- 11338 bytes
- Lines
- 356
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
../inc/clock_source.h
Detected Declarations
struct dce110_clk_src_shiftstruct dce110_clk_src_maskstruct dce110_clk_src_regsstruct dce110_clk_srcstruct pixel_rate_range_table_entry
Annotated Snippet
struct dce110_clk_src_shift {
CS_REG_FIELD_LIST(uint8_t)
CS_REG_FIELD_LIST_DCN32(uint8_t)
CS_REG_FIELD_LIST_DCN401(uint8_t)
};
struct dce110_clk_src_mask {
CS_REG_FIELD_LIST(uint32_t)
CS_REG_FIELD_LIST_DCN32(uint32_t)
CS_REG_FIELD_LIST_DCN401(uint32_t)
};
struct dce110_clk_src_regs {
uint32_t RESYNC_CNTL;
uint32_t PIXCLK_RESYNC_CNTL;
uint32_t PLL_CNTL;
uint32_t OTG_PIXEL_RATE_DIV;
/* below are for DTO.
* todo: should probably use different struct to not waste space
*/
uint32_t PHASE[MAX_PIPES];
uint32_t MODULO[MAX_PIPES];
uint32_t PIXEL_RATE_CNTL[MAX_PIPES];
};
struct dce110_clk_src {
struct clock_source base;
const struct dce110_clk_src_regs *regs;
const struct dce110_clk_src_mask *cs_mask;
const struct dce110_clk_src_shift *cs_shift;
struct dc_bios *bios;
struct spread_spectrum_data *dp_ss_params;
uint32_t dp_ss_params_cnt;
struct spread_spectrum_data *hdmi_ss_params;
uint32_t hdmi_ss_params_cnt;
struct spread_spectrum_data *dvi_ss_params;
uint32_t dvi_ss_params_cnt;
struct spread_spectrum_data *lvds_ss_params;
uint32_t lvds_ss_params_cnt;
uint32_t ext_clk_khz;
uint32_t ref_freq_khz;
struct calc_pll_clock_source calc_pll;
struct calc_pll_clock_source calc_pll_hdmi;
};
bool dce110_clk_src_construct(
struct dce110_clk_src *clk_src,
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
const struct dce110_clk_src_regs *regs,
const struct dce110_clk_src_shift *cs_shift,
const struct dce110_clk_src_mask *cs_mask);
bool dce112_clk_src_construct(
struct dce110_clk_src *clk_src,
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
const struct dce110_clk_src_regs *regs,
const struct dce110_clk_src_shift *cs_shift,
const struct dce110_clk_src_mask *cs_mask);
bool dcn20_clk_src_construct(
struct dce110_clk_src *clk_src,
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
const struct dce110_clk_src_regs *regs,
const struct dce110_clk_src_shift *cs_shift,
const struct dce110_clk_src_mask *cs_mask);
bool dcn3_clk_src_construct(
struct dce110_clk_src *clk_src,
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
const struct dce110_clk_src_regs *regs,
const struct dce110_clk_src_shift *cs_shift,
const struct dce110_clk_src_mask *cs_mask);
bool dcn301_clk_src_construct(
struct dce110_clk_src *clk_src,
struct dc_context *ctx,
struct dc_bios *bios,
enum clock_source_id id,
Annotation
- Immediate include surface: `../inc/clock_source.h`.
- Detected declarations: `struct dce110_clk_src_shift`, `struct dce110_clk_src_mask`, `struct dce110_clk_src_regs`, `struct dce110_clk_src`, `struct pixel_rate_range_table_entry`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.