drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h- Extension
.h- Size
- 11693 bytes
- Lines
- 288
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ipp.h
Detected Declarations
struct dce_ipp_shiftstruct dce_ipp_maskstruct dce_ipp_registersstruct dce_ipp
Annotated Snippet
struct dce_ipp_shift {
IPP_REG_FIELD_LIST(uint8_t);
};
struct dce_ipp_mask {
IPP_REG_FIELD_LIST(uint32_t);
};
struct dce_ipp_registers {
uint32_t CUR_UPDATE;
uint32_t CUR_CONTROL;
uint32_t CUR_POSITION;
uint32_t CUR_HOT_SPOT;
uint32_t CUR_COLOR1;
uint32_t CUR_COLOR2;
uint32_t CUR_SIZE;
uint32_t CUR_SURFACE_ADDRESS_HIGH;
uint32_t CUR_SURFACE_ADDRESS;
uint32_t PRESCALE_GRPH_CONTROL;
uint32_t PRESCALE_VALUES_GRPH_R;
uint32_t PRESCALE_VALUES_GRPH_G;
uint32_t PRESCALE_VALUES_GRPH_B;
uint32_t INPUT_GAMMA_CONTROL;
uint32_t DCFE_MEM_PWR_CTRL;
uint32_t DC_LUT_WRITE_EN_MASK;
uint32_t DC_LUT_RW_MODE;
uint32_t DC_LUT_CONTROL;
uint32_t DC_LUT_RW_INDEX;
uint32_t DC_LUT_SEQ_COLOR;
uint32_t DEGAMMA_CONTROL;
};
struct dce_ipp {
struct input_pixel_processor base;
const struct dce_ipp_registers *regs;
const struct dce_ipp_shift *ipp_shift;
const struct dce_ipp_mask *ipp_mask;
};
void dce_ipp_construct(struct dce_ipp *ipp_dce,
struct dc_context *ctx,
int inst,
const struct dce_ipp_registers *regs,
const struct dce_ipp_shift *ipp_shift,
const struct dce_ipp_mask *ipp_mask);
#if defined(CONFIG_DRM_AMD_DC_SI)
void dce60_ipp_construct(struct dce_ipp *ipp_dce,
struct dc_context *ctx,
int inst,
const struct dce_ipp_registers *regs,
const struct dce_ipp_shift *ipp_shift,
const struct dce_ipp_mask *ipp_mask);
#endif
void dce_ipp_destroy(struct input_pixel_processor **ipp);
#endif /* _DCE_IPP_H_ */
Annotation
- Immediate include surface: `ipp.h`.
- Detected declarations: `struct dce_ipp_shift`, `struct dce_ipp_mask`, `struct dce_ipp_registers`, `struct dce_ipp`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.