drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c- Extension
.c- Size
- 12324 bytes
- Lines
- 558
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dm_services.hdce/dce_11_0_d.hdce/dce_11_0_sh_mask.hdce110_transform_v.h
Detected Declarations
function filesfunction set_bypass_input_gammafunction configure_regamma_modefunction regamma_config_regions_and_segmentsfunction program_pwlfunction dce110_opp_program_regamma_pwl_vfunction dce110_opp_power_on_regamma_lut_vfunction dce110_opp_set_regamma_mode_v
Annotated Snippet
while (i != params->hw_points_num) {
dm_write_reg(xfm_dce->base.ctx, addr, rgb->red_reg);
dm_write_reg(xfm_dce->base.ctx, addr, rgb->green_reg);
dm_write_reg(xfm_dce->base.ctx, addr, rgb->blue_reg);
dm_write_reg(xfm_dce->base.ctx, addr,
rgb->delta_red_reg);
dm_write_reg(xfm_dce->base.ctx, addr,
rgb->delta_green_reg);
dm_write_reg(xfm_dce->base.ctx, addr,
rgb->delta_blue_reg);
++rgb;
++i;
}
}
}
void dce110_opp_program_regamma_pwl_v(
struct transform *xfm,
const struct pwl_params *params)
{
struct dce_transform *xfm_dce = TO_DCE_TRANSFORM(xfm);
/* Setup regions */
regamma_config_regions_and_segments(xfm_dce, params);
set_bypass_input_gamma(xfm_dce);
/* Power on gamma LUT memory */
power_on_lut(xfm, true, false, true);
/* Program PWL */
program_pwl(xfm_dce, params);
/* program regamma config */
configure_regamma_mode(xfm_dce, 1);
/* Power return to auto back */
power_on_lut(xfm, false, false, true);
}
void dce110_opp_power_on_regamma_lut_v(
struct transform *xfm,
bool power_on)
{
uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL);
set_reg_field_value(
value,
0,
DCFEV_MEM_PWR_CTRL,
COL_MAN_GAMMA_CORR_MEM_PWR_FORCE);
set_reg_field_value(
value,
power_on,
DCFEV_MEM_PWR_CTRL,
COL_MAN_GAMMA_CORR_MEM_PWR_DIS);
set_reg_field_value(
value,
0,
DCFEV_MEM_PWR_CTRL,
COL_MAN_INPUT_GAMMA_MEM_PWR_FORCE);
set_reg_field_value(
value,
power_on,
DCFEV_MEM_PWR_CTRL,
COL_MAN_INPUT_GAMMA_MEM_PWR_DIS);
dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value);
}
void dce110_opp_set_regamma_mode_v(
struct transform *xfm,
enum opp_regamma mode)
{
(void)xfm;
(void)mode;
// TODO: need to implement the function
}
Annotation
- Immediate include surface: `dm_services.h`, `dce/dce_11_0_d.h`, `dce/dce_11_0_sh_mask.h`, `dce110_transform_v.h`.
- Detected declarations: `function files`, `function set_bypass_input_gamma`, `function configure_regamma_mode`, `function regamma_config_regions_and_segments`, `function program_pwl`, `function dce110_opp_program_regamma_pwl_v`, `function dce110_opp_power_on_regamma_lut_v`, `function dce110_opp_set_regamma_mode_v`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.