drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.h
Extension
.h
Size
9743 bytes
Lines
295
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dce110_timing_generator_offsets {
	int32_t crtc;
	int32_t dcp;

	/* DCE80 use only */
	int32_t dmif;
};

struct dce110_timing_generator {
	struct timing_generator base;
	struct dce110_timing_generator_offsets offsets;
	struct dce110_timing_generator_offsets derived_offsets;

	enum controller_id controller_id;

	uint32_t max_h_total;
	uint32_t max_v_total;

	uint32_t min_h_blank;
	uint32_t min_h_front_porch;
	uint32_t min_h_back_porch;

	/* DCE 12 */
	uint32_t min_h_sync_width;
	uint32_t min_v_sync_width;
	uint32_t min_v_blank;

};

#define DCE110TG_FROM_TG(tg)\
	container_of(tg, struct dce110_timing_generator, base)

void dce110_timing_generator_construct(
	struct dce110_timing_generator *tg,
	struct dc_context *ctx,
	uint32_t instance,
	const struct dce110_timing_generator_offsets *offsets);

/* determine if given timing can be supported by TG */
bool dce110_timing_generator_validate_timing(
	struct timing_generator *tg,
	const struct dc_crtc_timing *timing,
	enum signal_type signal);

/******** HW programming ************/

/* Program timing generator with given timing */
bool dce110_timing_generator_program_timing_generator(
	struct timing_generator *tg,
	const struct dc_crtc_timing *dc_crtc_timing);

/* Disable/Enable Timing Generator */
bool dce110_timing_generator_enable_crtc(struct timing_generator *tg);
bool dce110_timing_generator_disable_crtc(struct timing_generator *tg);

void dce110_timing_generator_set_early_control(
		struct timing_generator *tg,
		uint32_t early_cntl);

/**************** TG current status ******************/

/* return the current frame counter. Used by Linux kernel DRM */
uint32_t dce110_timing_generator_get_vblank_counter(
		struct timing_generator *tg);

void dce110_timing_generator_get_position(
	struct timing_generator *tg,
	struct crtc_position *position);

/* return true if TG counter is moving. false if TG is stopped */
bool dce110_timing_generator_is_counter_moving(struct timing_generator *tg);

/* wait until TG is in beginning of vertical blank region */
void dce110_timing_generator_wait_for_vblank(struct timing_generator *tg);

/* wait until TG is in beginning of active region */
void dce110_timing_generator_wait_for_vactive(struct timing_generator *tg);

/*********** Timing Generator Synchronization routines ****/

/* Setups Global Swap Lock group, TimingServer or TimingClient*/
void dce110_timing_generator_setup_global_swap_lock(
	struct timing_generator *tg,
	const struct dcp_gsl_params *gsl_params);

/* Clear all the register writes done by setup_global_swap_lock */
void dce110_timing_generator_tear_down_global_swap_lock(
	struct timing_generator *tg);

/* Reset crtc position on master VSync */

Annotation

Implementation Notes