drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.h- Extension
.h- Size
- 1545 bytes
- Lines
- 44
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
core_types.h
Detected Declarations
struct dc
Annotated Snippet
#ifndef __DC_HWSS_DCN10_DEBUG_H__
#define __DC_HWSS_DCN10_DEBUG_H__
#include "core_types.h"
struct dc;
void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);
void dcn10_log_hw_state(struct dc *dc,
struct dc_log_buffer_ctx *log_ctx);
void dcn10_get_hw_state(struct dc *dc,
char *pBuf,
unsigned int bufSize,
unsigned int mask);
#endif /* __DC_HWSS_DCN10_DEBUG_H__ */
Annotation
- Immediate include surface: `core_types.h`.
- Detected declarations: `struct dc`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.