drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c- Extension
.c- Size
- 31500 bytes
- Lines
- 877
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
reg_helper.hfixed31_32.hresource.hdwb.hdcn20_dwb.h
Detected Declarations
function wbscl_set_scaler_filterfunction dwb_program_horz_scalarfunction dwb_program_vert_scalar
Annotated Snippet
#include "reg_helper.h"
#include "fixed31_32.h"
#include "resource.h"
#include "dwb.h"
#include "dcn20_dwb.h"
#define NUM_PHASES 16
#define HORZ_MAX_TAPS 12
#define VERT_MAX_TAPS 12
#define REG(reg)\
dwbc20->dwbc_regs->reg
#define CTX \
dwbc20->base.ctx
#undef FN
#define FN(reg_name, field_name) \
dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
#define TO_DCN20_DWBC(dwbc_base) \
container_of(dwbc_base, struct dcn20_dwbc, base)
static const uint16_t filter_3tap_16p_upscale[27] = {
2048, 2048, 0,
1708, 2424, 16348,
1372, 2796, 16308,
1056, 3148, 16272,
768, 3464, 16244,
512, 3728, 16236,
296, 3928, 16252,
124, 4052, 16296,
0, 4096, 0
};
static const uint16_t filter_3tap_16p_117[27] = {
2048, 2048, 0,
1824, 2276, 16376,
1600, 2496, 16380,
1376, 2700, 16,
1156, 2880, 52,
948, 3032, 108,
756, 3144, 192,
580, 3212, 296,
428, 3236, 428
};
static const uint16_t filter_3tap_16p_150[27] = {
2048, 2048, 0,
1872, 2184, 36,
1692, 2308, 88,
1516, 2420, 156,
1340, 2516, 236,
1168, 2592, 328,
1004, 2648, 440,
844, 2684, 560,
696, 2696, 696
};
static const uint16_t filter_3tap_16p_183[27] = {
2048, 2048, 0,
1892, 2104, 92,
1744, 2152, 196,
1592, 2196, 300,
1448, 2232, 412,
1304, 2256, 528,
1168, 2276, 648,
1032, 2288, 772,
900, 2292, 900
};
static const uint16_t filter_4tap_16p_upscale[36] = {
0, 4096, 0, 0,
16240, 4056, 180, 16380,
16136, 3952, 404, 16364,
16072, 3780, 664, 16344,
16040, 3556, 952, 16312,
16036, 3284, 1268, 16272,
16052, 2980, 1604, 16224,
16084, 2648, 1952, 16176,
16128, 2304, 2304, 16128
};
static const uint16_t filter_4tap_16p_117[36] = {
428, 3236, 428, 0,
276, 3232, 604, 16364,
148, 3184, 800, 16340,
44, 3104, 1016, 16312,
16344, 2984, 1244, 16284,
Annotation
- Immediate include surface: `reg_helper.h`, `fixed31_32.h`, `resource.h`, `dwb.h`, `dcn20_dwb.h`.
- Detected declarations: `function wbscl_set_scaler_filter`, `function dwb_program_horz_scalar`, `function dwb_program_vert_scalar`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.