drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c- Extension
.c- Size
- 13587 bytes
- Lines
- 415
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
reg_helper.hcore_types.hlink_encoder.hdcn31/dcn31_dio_link_encoder.hdcn35_dio_link_encoder.hdc_dmub_srv.h
Detected Declarations
function filesfunction dcn35_get_dig_modefunction dcn35_link_encoder_setupfunction dcn35_link_encoder_initfunction dcn35_link_encoder_set_fgcgfunction dcn35_link_encoder_constructfunction link_dpia_controlfunction link_encoder_disablefunction dcn35_link_encoder_enable_dp_outputfunction dcn35_link_encoder_enable_dp_mst_outputfunction dcn35_link_encoder_disable_outputfunction dcn35_link_encoder_enable_dpia_outputfunction dcn35_link_encoder_disable_dpia_output
Annotated Snippet
#include "reg_helper.h"
#include "core_types.h"
#include "link_encoder.h"
#include "dcn31/dcn31_dio_link_encoder.h"
#include "dcn35_dio_link_encoder.h"
#include "dc_dmub_srv.h"
#define CTX \
enc10->base.ctx
#define DC_LOGGER \
enc10->base.ctx->logger
#define REG(reg)\
(enc10->link_regs->reg)
#undef FN
#define FN(reg_name, field_name) \
enc10->link_shift->field_name, enc10->link_mask->field_name
/*
* @brief
* Trigger Source Select
* ASIC-dependent, actual values for register programming
*/
#define DCN35_DIG_FE_SOURCE_SELECT_INVALID 0x0
#define DCN35_DIG_FE_SOURCE_SELECT_DIGA 0x1
#define DCN35_DIG_FE_SOURCE_SELECT_DIGB 0x2
#define DCN35_DIG_FE_SOURCE_SELECT_DIGC 0x4
#define DCN35_DIG_FE_SOURCE_SELECT_DIGD 0x08
#define DCN35_DIG_FE_SOURCE_SELECT_DIGE 0x10
bool dcn35_is_dig_enabled(struct link_encoder *enc)
{
uint32_t enabled;
struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
REG_GET(DIG_BE_CLK_CNTL, DIG_BE_CLK_EN, &enabled);
return (enabled == 1);
}
enum signal_type dcn35_get_dig_mode(
struct link_encoder *enc)
{
uint32_t value;
struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
REG_GET(DIG_BE_CLK_CNTL, DIG_BE_MODE, &value);
switch (value) {
case 0:
return SIGNAL_TYPE_DISPLAY_PORT;
case 2:
return SIGNAL_TYPE_DVI_SINGLE_LINK;
case 3:
return SIGNAL_TYPE_HDMI_TYPE_A;
case 5:
return SIGNAL_TYPE_DISPLAY_PORT_MST;
default:
return SIGNAL_TYPE_NONE;
}
}
void dcn35_link_encoder_setup(
struct link_encoder *enc,
enum signal_type signal)
{
struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc);
switch (signal) {
case SIGNAL_TYPE_EDP:
case SIGNAL_TYPE_DISPLAY_PORT:
/* DP SST */
REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 0);
break;
case SIGNAL_TYPE_DVI_SINGLE_LINK:
case SIGNAL_TYPE_DVI_DUAL_LINK:
/* TMDS-DVI */
REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 2);
break;
case SIGNAL_TYPE_HDMI_TYPE_A:
/* TMDS-HDMI */
REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 3);
break;
case SIGNAL_TYPE_DISPLAY_PORT_MST:
/* DP MST */
REG_UPDATE(DIG_BE_CLK_CNTL, DIG_BE_MODE, 5);
break;
default:
ASSERT_CRITICAL(false);
/* invalid mode ! */
break;
Annotation
- Immediate include surface: `reg_helper.h`, `core_types.h`, `link_encoder.h`, `dcn31/dcn31_dio_link_encoder.h`, `dcn35_dio_link_encoder.h`, `dc_dmub_srv.h`.
- Detected declarations: `function files`, `function dcn35_get_dig_mode`, `function dcn35_link_encoder_setup`, `function dcn35_link_encoder_init`, `function dcn35_link_encoder_set_fgcg`, `function dcn35_link_encoder_construct`, `function link_dpia_control`, `function link_encoder_disable`, `function dcn35_link_encoder_enable_dp_output`, `function dcn35_link_encoder_enable_dp_mst_output`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.