drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c- Extension
.c- Size
- 296140 bytes
- Lines
- 7618
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dc.h../display_mode_lib.hdisplay_mode_vba_314.h../dml_inline_defs.h../dml1_frl_cap_chk.h
Detected Declarations
function dml314_recalculatefunction dscceComputeDelayfunction dscComputeDelayfunction CalculatePrefetchSchedulefunction RoundToDFSGranularityUpfunction RoundToDFSGranularityDownfunction CalculateDCCConfigurationfunction CalculatePrefetchSourceLinesfunction CalculateVMAndRowBytesfunction DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculationfunction DisplayPipeConfigurationfunction CalculateBytePerPixelAnd256BBlockSizesfunction CalculateTWaitfunction dml314_CalculateWriteBackDISPCLKfunction CalculateWriteBackDelayfunction CalculateVupdateAndDynamicMetadataParametersfunction CalculateRowBandwidthfunction CalculateFlipSchedulefunction TruncToValidBPPfunction CalculatePrefetchSchedulePerPlanefunction dml314_ModeSupportAndSystemConfigurationFullfunction CalculateWatermarksAndDRAMSpeedChangeSupportfunction CalculateDCFCLKDeepSleepfunction CalculateUrgentBurstFactorfunction CalculatePixelDeliveryTimesfunction CalculateMetaAndPTETimesfunction CalculateVMGroupAndRequestTimesfunction CalculateStutterEfficiencyfunction CalculateSwathAndDETConfigurationfunction CalculateSwathWidthfunction CalculateExtraLatencyfunction CalculateExtraLatencyBytesfunction CalculateUrgentLatencyfunction RequiredDTBCLKfunction UseMinimumDCFCLKfunction CalculateUnboundedRequestAndCompressedBufferSizefunction UnboundedRequestfunction CalculateMaxVStartup
Annotated Snippet
if (VStartup * LineTime < *TSetup + *Tdmdl + Tdmbf + Tdmec + Tdmsks) {
*NotEnoughTimeForDynamicMetadata = true;
dml_print("DML::%s: Not Enough Time for Dynamic Meta!\n", __func__);
dml_print("DML::%s: Tdmbf: %fus - time for dmd transfer from dchub to dio output buffer\n", __func__, Tdmbf);
dml_print("DML::%s: Tdmec: %fus - time dio takes to transfer dmd\n", __func__, Tdmec);
dml_print("DML::%s: Tdmsks: %fus - time before active dmd must complete transmission at dio\n", __func__, Tdmsks);
dml_print("DML::%s: Tdmdl: %fus - time for fabric to become ready and fetch dmd\n", __func__, *Tdmdl);
} else {
*NotEnoughTimeForDynamicMetadata = false;
}
} else {
*NotEnoughTimeForDynamicMetadata = false;
}
*Tdmdl_vm = (DynamicMetadataEnable == true && DynamicMetadataVMEnabled == true && GPUVMEnable == true ? TWait + Tvm_trips : 0);
if (myPipe->ScalerEnabled)
DPPCycles = (unsigned int)(DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCL);
else
DPPCycles = (unsigned int)(DPPCLKDelaySubtotalPlusCNVCFormater + DPPCLKDelaySCLLBOnly);
DPPCycles = (unsigned int)(DPPCycles + myPipe->NumberOfCursors * DPPCLKDelayCNVCCursor);
DISPCLKCycles = (unsigned int)DISPCLKDelaySubtotal;
if (myPipe->DPPCLK == 0.0 || myPipe->DISPCLK == 0.0)
return true;
*DSTXAfterScaler = DPPCycles * myPipe->PixelClock / myPipe->DPPCLK + DISPCLKCycles * myPipe->PixelClock / myPipe->DISPCLK + DSCDelay;
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: DPPCycles: %d\n", __func__, DPPCycles);
dml_print("DML::%s: PixelClock: %f\n", __func__, myPipe->PixelClock);
dml_print("DML::%s: DPPCLK: %f\n", __func__, myPipe->DPPCLK);
dml_print("DML::%s: DISPCLKCycles: %d\n", __func__, DISPCLKCycles);
dml_print("DML::%s: DISPCLK: %f\n", __func__, myPipe->DISPCLK);
dml_print("DML::%s: DSCDelay: %d\n", __func__, DSCDelay);
dml_print("DML::%s: DSTXAfterScaler: %d\n", __func__, *DSTXAfterScaler);
dml_print("DML::%s: ODMCombineIsEnabled: %d\n", __func__, myPipe->ODMCombineIsEnabled);
#endif
*DSTXAfterScaler = *DSTXAfterScaler + ((myPipe->ODMCombineIsEnabled) ? 18 : 0) + (myPipe->DPPPerPlane - 1) * DPP_RECOUT_WIDTH;
if (OutputFormat == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP))
*DSTYAfterScaler = 1;
else
*DSTYAfterScaler = 0;
DSTTotalPixelsAfterScaler = *DSTYAfterScaler * myPipe->HTotal + *DSTXAfterScaler;
*DSTYAfterScaler = dml_floor(DSTTotalPixelsAfterScaler / myPipe->HTotal, 1);
*DSTXAfterScaler = DSTTotalPixelsAfterScaler - ((double) (*DSTYAfterScaler * myPipe->HTotal));
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: DSTXAfterScaler: %d (final)\n", __func__, *DSTXAfterScaler);
#endif
MyError = false;
Tr0_trips = trip_to_mem * (HostVMDynamicLevelsTrips + 1);
Tvm_trips_rounded = dml_ceil(4.0 * Tvm_trips / LineTime, 1) / 4 * LineTime;
Tr0_trips_rounded = dml_ceil(4.0 * Tr0_trips / LineTime, 1) / 4 * LineTime;
#ifdef __DML_VBA_ALLOW_DELTA__
if (!myPipe->DCCEnable) {
Tr0_trips = 0.0;
Tr0_trips_rounded = 0.0;
}
#endif
if (!GPUVMEnable) {
Tvm_trips = 0.0;
Tvm_trips_rounded = 0.0;
}
if (GPUVMEnable) {
if (GPUVMPageTableLevels >= 3) {
*Tno_bw = UrgentExtraLatency + trip_to_mem * ((GPUVMPageTableLevels - 2) - 1);
} else {
*Tno_bw = 0;
}
} else if (!myPipe->DCCEnable) {
*Tno_bw = LineTime;
} else {
*Tno_bw = LineTime / 4;
}
if (myPipe->SourcePixelFormat == dm_420_8 || myPipe->SourcePixelFormat == dm_420_10 || myPipe->SourcePixelFormat == dm_420_12)
bytes_pp = myPipe->BytePerPixelY + myPipe->BytePerPixelC / 4;
else
bytes_pp = myPipe->BytePerPixelY + myPipe->BytePerPixelC;
Annotation
- Immediate include surface: `dc.h`, `../display_mode_lib.h`, `display_mode_vba_314.h`, `../dml_inline_defs.h`, `../dml1_frl_cap_chk.h`.
- Detected declarations: `function dml314_recalculate`, `function dscceComputeDelay`, `function dscComputeDelay`, `function CalculatePrefetchSchedule`, `function RoundToDFSGranularityUp`, `function RoundToDFSGranularityDown`, `function CalculateDCCConfiguration`, `function CalculatePrefetchSourceLines`, `function CalculateVMAndRowBytes`, `function DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.