drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h- Extension
.h- Size
- 24039 bytes
- Lines
- 742
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dc_features.hdisplay_mode_enums.h
Detected Declarations
struct _vcs_dpi_voltage_scaling_ststruct _vcs_dpi_soc_bounding_box_ststruct _vcs_dpi_ip_params_ststruct _vcs_dpi_display_xfc_params_ststruct _vcs_dpi_display_pipe_source_params_ststruct writeback_ststruct display_audio_params_ststruct _vcs_dpi_display_output_params_ststruct _vcs_dpi_scaler_ratio_depth_ststruct _vcs_dpi_scaler_taps_ststruct _vcs_dpi_display_pipe_dest_params_ststruct _vcs_dpi_display_pipe_params_ststruct _vcs_dpi_display_clocks_and_cfg_ststruct _vcs_dpi_display_e2e_pipe_params_ststruct _vcs_dpi_display_data_rq_misc_params_ststruct _vcs_dpi_display_data_rq_sizing_params_ststruct _vcs_dpi_display_data_rq_dlg_params_ststruct _vcs_dpi_display_rq_dlg_params_ststruct _vcs_dpi_display_rq_sizing_params_ststruct _vcs_dpi_display_rq_misc_params_ststruct _vcs_dpi_display_rq_params_ststruct _vcs_dpi_display_dlg_regs_ststruct _vcs_dpi_display_ttu_regs_ststruct _vcs_dpi_display_data_rq_regs_ststruct _vcs_dpi_display_rq_regs_ststruct _vcs_dpi_display_dlg_sys_params_ststruct _vcs_dpi_display_arb_params_st
Annotated Snippet
struct _vcs_dpi_voltage_scaling_st {
int state;
double dscclk_mhz;
double dcfclk_mhz;
double socclk_mhz;
double phyclk_d18_mhz;
double phyclk_d32_mhz;
double dram_speed_mts;
double fabricclk_mhz;
double dispclk_mhz;
double dram_bw_per_chan_gbps;
double phyclk_mhz;
double dppclk_mhz;
double dtbclk_mhz;
float net_bw_in_kbytes_sec;
};
/**
* _vcs_dpi_soc_bounding_box_st: SOC definitions
*
* This struct maintains the SOC Bounding Box information for the ASIC; it
* defines things such as clock, voltage, performance, etc. Usually, we load
* these values from VBIOS; if something goes wrong, we use some hard-coded
* values, which will enable the ASIC to light up with limitations.
*/
struct _vcs_dpi_soc_bounding_box_st {
struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];
/**
* @num_states: It represents the total of Display Power Management
* (DPM) supported by the specific ASIC.
*/
unsigned int num_states;
double sr_exit_time_us;
double sr_enter_plus_exit_time_us;
double sr_exit_z8_time_us;
double sr_enter_plus_exit_z8_time_us;
double urgent_latency_us;
double urgent_latency_pixel_data_only_us;
double urgent_latency_pixel_mixed_with_vm_data_us;
double urgent_latency_vm_data_only_us;
double usr_retraining_latency_us;
double smn_latency_us;
double fclk_change_latency_us;
double mall_allocated_for_dcn_mbytes;
double pct_ideal_fabric_bw_after_urgent;
double pct_ideal_dram_bw_after_urgent_strobe;
double max_avg_fabric_bw_use_normal_percent;
double max_avg_dram_bw_use_normal_strobe_percent;
enum dm_prefetch_modes allow_for_pstate_or_stutter_in_vblank_final;
bool dram_clock_change_requirement_final;
double writeback_latency_us;
double ideal_dram_bw_after_urgent_percent;
double pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly
double pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm;
double pct_ideal_dram_sdp_bw_after_urgent_vm_only;
double pct_ideal_sdp_bw_after_urgent;
double max_avg_sdp_bw_use_normal_percent;
double max_avg_dram_bw_use_normal_percent;
unsigned int max_request_size_bytes;
double downspread_percent;
double dram_page_open_time_ns;
double dram_rw_turnaround_time_ns;
double dram_return_buffer_per_channel_bytes;
double dram_channel_width_bytes;
double fabric_datapath_to_dcn_data_return_bytes;
double dcn_downspread_percent;
double dispclk_dppclk_vco_speed_mhz;
double dfs_vco_period_ps;
unsigned int urgent_out_of_order_return_per_channel_pixel_only_bytes;
unsigned int urgent_out_of_order_return_per_channel_pixel_and_vm_bytes;
unsigned int urgent_out_of_order_return_per_channel_vm_only_bytes;
unsigned int round_trip_ping_latency_dcfclk_cycles;
unsigned int urgent_out_of_order_return_per_channel_bytes;
unsigned int channel_interleave_bytes;
unsigned int num_banks;
unsigned int num_chans;
unsigned int vmm_page_size_bytes;
unsigned int hostvm_min_page_size_bytes;
unsigned int gpuvm_min_page_size_bytes;
double dram_clock_change_latency_us;
double dummy_pstate_latency_us;
double writeback_dram_clock_change_latency_us;
unsigned int return_bus_width_bytes;
unsigned int voltage_override;
double xfc_bus_transport_time_us;
double xfc_xbuf_latency_tolerance_us;
int use_urgent_burst_bw;
double min_dcfclk;
bool do_urgent_latency_adjustment;
double urgent_latency_adjustment_fabric_clock_component_us;
Annotation
- Immediate include surface: `dc_features.h`, `display_mode_enums.h`.
- Detected declarations: `struct _vcs_dpi_voltage_scaling_st`, `struct _vcs_dpi_soc_bounding_box_st`, `struct _vcs_dpi_ip_params_st`, `struct _vcs_dpi_display_xfc_params_st`, `struct _vcs_dpi_display_pipe_source_params_st`, `struct writeback_st`, `struct display_audio_params_st`, `struct _vcs_dpi_display_output_params_st`, `struct _vcs_dpi_scaler_ratio_depth_st`, `struct _vcs_dpi_scaler_taps_st`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.