drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml/dml1_frl_cap_chk.h
Extension
.h
Size
5141 bytes
Lines
174
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct frl_dml_borrow_params {
	int audio_packets_line;
	int hc_active_target;
	int hc_blank_target;
	enum frl_borrow_mode borrow_mode;
};

struct frl_primary_format {
	uint32_t vic;
	uint32_t frl_rate;
	uint32_t frl_lanes;
	uint32_t hc_active;
	uint32_t hc_blank;
};

struct frl_cap_chk_intermediates {
	int      c_frl_sb;
	double   overhead_sb;
	double   overhead_rs;
	double   overhead_map;
	double   overhead_min;
	double   overhead_max;
	double   f_pixel_clock_max;
	double   t_line;
	double   r_bit_min;
	double   r_frl_char_min;
	double   c_frl_line;
	double   ap;
	double   r_ap;
	double   avg_audio_packets_line;
	int      audio_packets_line;
	int      blank_audio_min;
};

struct frl_cap_chk_params {
	int      lanes;
	double   f_pixel_clock_nominal;   /* Pixel Clock rate (Hz)  */
	double   r_bit_nominal;           /* FRL bitrate (bps) */
	int      audio_packet_type;
	double   f_audio;                 /* Audio rate (Hz) */
	int      h_active;                /* Active pixels per line */
	int      h_blank;                 /* Blanking pixels per line */
	int      bpc;                     /* Bits per component */
	int      vic;                     /* Video Identification Code */

	enum hdmi_frl_pixel_encoding    pixel_encoding;

	bool     compressed;              /* set to true if DSC is enabled */
	bool     bypass_hc_target_calc;   /* debug only */
	bool     allow_all_bpp;           /* dsc_all_bpp */

	/* DSC parameters */
	int      slices;
	int      slice_width;
	double   bpp_target;
	bool     is_ovt;
	int      layout;
	int      acat;    /* not supported */

	/* outputs */
	struct frl_dml_borrow_params borrow_params;
	int      average_tribyte_rate;
};

enum frl_cap_chk_result dml1_frl_cap_chk(struct frl_cap_chk_params *params);

enum frl_cap_chk_result dml1_frl_cap_chk_inter(struct frl_cap_chk_params *params,
					       struct frl_cap_chk_intermediates *inter);

enum frl_cap_chk_result dml1_frl_cap_chk_common(struct frl_cap_chk_intermediates *inter,
						struct frl_cap_chk_params *params);

enum frl_cap_chk_result dml1_frl_cap_chk_uncompressed(struct frl_cap_chk_params *params,
						      struct frl_cap_chk_intermediates *inter);

enum frl_cap_chk_result dml1_frl_cap_chk_compressed(struct frl_cap_chk_params *params,
						    struct frl_cap_chk_intermediates *inter);
#endif

void frl_modified_pix_clock_for_dsc_padding(const int hc_active_target,
	const int hc_blank_target,
	const uint8_t frl_num_lanes,
	const uint32_t pix_clk_100hz,
	const int frl_link_rate,
	const uint32_t h_addressable,
	const uint32_t h_border_left,
	const uint32_t h_border_right,
	const uint32_t h_total,
	const uint32_t h_addressable_otg,
	uint32_t *pix_clk_100hz_otg,

Annotation

Implementation Notes