drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/display_mode_core.h- Extension
.h- Size
- 10662 bytes
- Lines
- 205
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
display_mode_core_structs.h
Detected Declarations
struct display_mode_lib_st
Annotated Snippet
#ifndef __DISPLAY_MODE_CORE_H__
#define __DISPLAY_MODE_CORE_H__
#include "display_mode_core_structs.h"
struct display_mode_lib_st;
dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib);
void dml_core_mode_support_partial(struct display_mode_lib_st *mode_lib);
void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struct dml_clk_cfg_st *clk_cfg);
void dml_core_get_row_heights(
dml_uint_t *dpte_row_height,
dml_uint_t *meta_row_height,
const struct display_mode_lib_st *mode_lib,
dml_bool_t is_plane1,
enum dml_source_format_class SourcePixelFormat,
enum dml_swizzle_mode SurfaceTiling,
enum dml_rotation_angle ScanDirection,
dml_uint_t pitch,
dml_uint_t GPUVMMinPageSizeKBytes);
dml_float_t dml_get_return_bw_mbps_vm_only(
const struct soc_bounding_box_st *soc,
dml_bool_t use_ideal_dram_bw_strobe,
dml_bool_t HostVMEnable,
dml_float_t DCFCLK,
dml_float_t FabricClock,
dml_float_t DRAMSpeed);
dml_float_t dml_get_return_bw_mbps(
const struct soc_bounding_box_st *soc,
dml_bool_t use_ideal_dram_bw_strobe,
dml_bool_t HostVMEnable,
dml_float_t DCFCLK,
dml_float_t FabricClock,
dml_float_t DRAMSpeed);
dml_bool_t dml_mode_support(
struct display_mode_lib_st *mode_lib,
dml_uint_t state_idx,
const struct dml_display_cfg_st *display_cfg);
dml_bool_t dml_mode_programming(
struct display_mode_lib_st *mode_lib,
dml_uint_t state_idx,
const struct dml_display_cfg_st *display_cfg,
bool call_standalone);
dml_uint_t dml_mode_support_ex(
struct dml_mode_support_ex_params_st *in_out_params);
dml_bool_t dml_get_is_phantom_pipe(struct display_mode_lib_st *mode_lib, dml_uint_t pipe_idx);
#define dml_get_per_surface_var_decl(variable, type) type dml_get_##variable(struct display_mode_lib_st *mode_lib, dml_uint_t surface_idx)
#define dml_get_var_decl(var, type) type dml_get_##var(struct display_mode_lib_st *mode_lib)
dml_get_var_decl(wm_urgent, dml_float_t);
dml_get_var_decl(wm_stutter_exit, dml_float_t);
dml_get_var_decl(wm_stutter_enter_exit, dml_float_t);
dml_get_var_decl(wm_memory_trip, dml_float_t);
dml_get_var_decl(wm_dram_clock_change, dml_float_t);
dml_get_var_decl(wm_z8_stutter_enter_exit, dml_float_t);
dml_get_var_decl(wm_z8_stutter, dml_float_t);
dml_get_var_decl(urgent_latency, dml_float_t);
dml_get_var_decl(clk_dcf_deepsleep, dml_float_t);
dml_get_var_decl(wm_fclk_change, dml_float_t);
dml_get_var_decl(wm_usr_retraining, dml_float_t);
dml_get_var_decl(urgent_latency, dml_float_t);
dml_get_var_decl(wm_writeback_dram_clock_change, dml_float_t);
dml_get_var_decl(wm_writeback_urgent, dml_float_t);
dml_get_var_decl(stutter_efficiency_no_vblank, dml_float_t);
dml_get_var_decl(stutter_efficiency, dml_float_t);
dml_get_var_decl(stutter_efficiency_z8, dml_float_t);
dml_get_var_decl(stutter_num_bursts_z8, dml_float_t);
dml_get_var_decl(stutter_period, dml_float_t);
dml_get_var_decl(stutter_efficiency_z8_bestcase, dml_float_t);
dml_get_var_decl(stutter_num_bursts_z8_bestcase, dml_float_t);
dml_get_var_decl(stutter_period_bestcase, dml_float_t);
dml_get_var_decl(urgent_latency, dml_float_t);
dml_get_var_decl(urgent_extra_latency, dml_float_t);
dml_get_var_decl(fclk_change_latency, dml_float_t);
dml_get_var_decl(nonurgent_latency, dml_float_t);
dml_get_var_decl(dispclk_calculated, dml_float_t);
dml_get_var_decl(total_data_read_bw, dml_float_t);
dml_get_var_decl(return_bw, dml_float_t);
dml_get_var_decl(return_dram_bw, dml_float_t);
dml_get_var_decl(tcalc, dml_float_t);
dml_get_var_decl(fraction_of_urgent_bandwidth, dml_float_t);
Annotation
- Immediate include surface: `display_mode_core_structs.h`.
- Detected declarations: `struct display_mode_lib_st`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.