drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper_fpu.c
Extension
.c
Size
24506 bytes
Lines
592
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (i >= __DML2_WRAPPER_MAX_STREAMS_PLANES__) {
				dml_print("DML::%s: Index out of bounds: i=%d, __DML2_WRAPPER_MAX_STREAMS_PLANES__=%d\n",
					  __func__, i, __DML2_WRAPPER_MAX_STREAMS_PLANES__);
				break;
			}
			dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[num_pipes] = dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id[i];
			dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[num_pipes] = true;
			dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[num_pipes] = dml2->v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id[i];
			dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[num_pipes] = true;
			num_pipes++;
		}
	}
}

static unsigned int pack_and_call_dml_mode_support_ex(struct dml2_context *dml2,
	const struct dml_display_cfg_st *display_cfg,
	struct dml_mode_support_info_st *evaluation_info,
	enum dc_validate_mode validate_mode)
{
	struct dml2_wrapper_scratch *s = &dml2->v20.scratch;

	s->mode_support_params.mode_lib = &dml2->v20.dml_core_ctx;
	s->mode_support_params.in_display_cfg = display_cfg;
	if (validate_mode == DC_VALIDATE_MODE_ONLY)
		s->mode_support_params.in_start_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1;
	else
		s->mode_support_params.in_start_state_idx = 0;
	s->mode_support_params.out_evaluation_info = evaluation_info;

	memset(evaluation_info, 0, sizeof(struct dml_mode_support_info_st));
	s->mode_support_params.out_lowest_state_idx = 0;

	return dml_mode_support_ex(&s->mode_support_params);
}

static bool optimize_configuration(struct dml2_context *dml2, struct dml2_wrapper_optimize_configuration_params *p)
{
	int unused_dpps = p->ip_params->max_num_dpp;
	int i;
	int odms_needed;
	int largest_blend_and_timing = 0;
	bool optimization_done = false;

	for (i = 0; i < (int) p->cur_display_config->num_timings; i++) {
		if (p->cur_display_config->plane.BlendingAndTiming[i] > largest_blend_and_timing)
			largest_blend_and_timing = p->cur_display_config->plane.BlendingAndTiming[i];
	}

	if (p->new_policy != p->cur_policy)
		*p->new_policy = *p->cur_policy;

	if (p->new_display_config != p->cur_display_config)
		*p->new_display_config = *p->cur_display_config;


	// Optimize Clocks
	if (!optimization_done) {
		if (largest_blend_and_timing == 0 && p->cur_policy->ODMUse[0] == dml_odm_use_policy_combine_as_needed && dml2->config.minimize_dispclk_using_odm) {
			odms_needed = dml2_util_get_maximum_odm_combine_for_output(dml2->config.optimize_odm_4to1,
				p->cur_display_config->output.OutputEncoder[0], p->cur_mode_support_info->DSCEnabled[0]) - 1;

			if (odms_needed <= unused_dpps) {
				if (odms_needed == 1) {
					p->new_policy->ODMUse[0] = dml_odm_use_policy_combine_2to1;
					optimization_done = true;
				} else if (odms_needed == 3) {
					p->new_policy->ODMUse[0] = dml_odm_use_policy_combine_4to1;
					optimization_done = true;
				} else
					optimization_done = false;
			}
		}
	}

	return optimization_done;
}

static int calculate_lowest_supported_state_for_temp_read(struct dml2_context *dml2, struct dc_state *display_state,
		enum dc_validate_mode validate_mode)
{
	struct dml2_calculate_lowest_supported_state_for_temp_read_scratch *s = &dml2->v20.scratch.dml2_calculate_lowest_supported_state_for_temp_read_scratch;
	struct dml2_wrapper_scratch *s_global = &dml2->v20.scratch;

	unsigned int dml_result = 0;
	int result = -1, i, j;

	build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy);

	/* Zero out before each call before proceeding */
	memset(s, 0, sizeof(struct dml2_calculate_lowest_supported_state_for_temp_read_scratch));

Annotation

Implementation Notes