drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c
Extension
.c
Size
40373 bytes
Lines
1037
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (pipe_ctx->dsc_padding_params.dsc_hactive_padding != 0) {
			pix_clk_100hz = pipe_ctx->dsc_padding_params.dsc_pix_clk_100hz;
		} else {
			pix_clk_100hz = stream->timing.pix_clk_100hz;
		}
		min_hardware_refresh_in_uhz = div64_u64((pix_clk_100hz * 100000000ULL),
				(timing->h_total * (long long)calc_max_hardware_v_total(stream)));
	}

	{
		uint64_t min_refresh = max((uint64_t)stream->timing.min_refresh_in_uhz, min_hardware_refresh_in_uhz);
		ASSERT(min_refresh <= ULONG_MAX);
		timing->drr_config.min_refresh_uhz = (unsigned long)min_refresh;
	}

	if (dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase &&
			stream->ctx->dc->config.enable_fpo_flicker_detection == 1)
		timing->drr_config.max_instant_vtotal_delta = dml_ctx->config.callbacks.get_max_flickerless_instant_vtotal_increase(stream, false);
	else
		timing->drr_config.max_instant_vtotal_delta = 0;

	if (stream->timing.flags.DSC) {
		timing->dsc.enable = dml2_dsc_enable;
		timing->dsc.overrides.num_slices = stream->timing.dsc_cfg.num_slices_h;
		timing->dsc.dsc_compressed_bpp_x16 = stream->timing.dsc_cfg.bits_per_pixel;
	} else
		timing->dsc.enable = dml2_dsc_disable;

	switch (stream->timing.display_color_depth) {
	case COLOR_DEPTH_666:
		timing->bpc = 6;
		break;
	case COLOR_DEPTH_888:
		timing->bpc = 8;
		break;
	case COLOR_DEPTH_101010:
		timing->bpc = 10;
		break;
	case COLOR_DEPTH_121212:
		timing->bpc = 12;
		break;
	case COLOR_DEPTH_141414:
		timing->bpc = 14;
		break;
	case COLOR_DEPTH_161616:
		timing->bpc = 16;
		break;
	case COLOR_DEPTH_999:
		timing->bpc = 9;
		break;
	case COLOR_DEPTH_111111:
		timing->bpc = 11;
		break;
	default:
		timing->bpc = 8;
		break;
	}

	timing->vblank_nom = timing->v_total - timing->v_active;
}

static void populate_dml21_output_config_from_stream_state(struct dml2_link_output_cfg *output,
		struct dc_stream_state *stream, const struct pipe_ctx *pipe)
{
	output->output_dp_lane_count = 4;

	switch (stream->signal) {
	case SIGNAL_TYPE_DISPLAY_PORT_MST:
	case SIGNAL_TYPE_DISPLAY_PORT:
		output->output_encoder = dml2_dp;
		if (check_dp2p0_output_encoder(pipe))
			output->output_encoder = dml2_dp2p0;
		break;
	case SIGNAL_TYPE_EDP:
		output->output_encoder = dml2_edp;
		break;
	case SIGNAL_TYPE_HDMI_TYPE_A:
	case SIGNAL_TYPE_DVI_SINGLE_LINK:
	case SIGNAL_TYPE_DVI_DUAL_LINK:
		output->output_encoder = dml2_hdmi;
		break;
	case SIGNAL_TYPE_HDMI_FRL:
		output->output_encoder = dml2_hdmifrl;
		break;
	default:
			output->output_encoder = dml2_dp;
	}

	switch (stream->timing.pixel_encoding) {
	case PIXEL_ENCODING_RGB:

Annotation

Implementation Notes