drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn4_soc_bb.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn4_soc_bb.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/bounding_boxes/dcn4_soc_bb.h
Extension
.h
Size
10734 bytes
Lines
373
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
//
// Copyright 2024 Advanced Micro Devices, Inc.

#ifndef __DML_DML_DCN4_SOC_BB__
#define __DML_DML_DCN4_SOC_BB__

#include "dml_top_soc_parameter_types.h"

static const struct dml2_soc_qos_parameters dml_dcn4_variant_a_soc_qos_params = {
	.derate_table = {
		.system_active_urgent = {
			.dram_derate_percent_pixel = 22,
			.dram_derate_percent_vm = 0,
			.dram_derate_percent_pixel_and_vm = 0,
			.fclk_derate_percent = 76,
			.dcfclk_derate_percent = 100,
		},
		.system_active_average = {
			.dram_derate_percent_pixel = 17,
			.dram_derate_percent_vm = 0,
			.dram_derate_percent_pixel_and_vm = 0,
			.fclk_derate_percent = 57,
			.dcfclk_derate_percent = 75,
		},
		.dcn_mall_prefetch_urgent = {
			.dram_derate_percent_pixel = 40,
			.dram_derate_percent_vm = 0,
			.dram_derate_percent_pixel_and_vm = 0,
			.fclk_derate_percent = 83,
			.dcfclk_derate_percent = 100,
		},
		.dcn_mall_prefetch_average = {
			.dram_derate_percent_pixel = 33,
			.dram_derate_percent_vm = 0,
			.dram_derate_percent_pixel_and_vm = 0,
			.fclk_derate_percent = 62,
			.dcfclk_derate_percent = 83,
		},
		.system_idle_average = {
			.dram_derate_percent_pixel = 70,
			.dram_derate_percent_vm = 0,
			.dram_derate_percent_pixel_and_vm = 0,
			.fclk_derate_percent = 83,
			.dcfclk_derate_percent = 100,
		},
	},
	.writeback = {
		.base_latency_us = 12,
		.scaling_factor_us = 0,
		.scaling_factor_mhz = 0,
	},
	.qos_params = {
		.dcn4x = {
			.df_qos_response_time_fclk_cycles = 300,
			.max_round_trip_to_furthest_cs_fclk_cycles = 350,
			.mall_overhead_fclk_cycles = 50,
			.meta_trip_adder_fclk_cycles = 36,
			.average_transport_distance_fclk_cycles = 257,
			.umc_urgent_ramp_latency_margin = 50,
			.umc_max_latency_margin = 30,
			.umc_average_latency_margin = 20,
			.fabric_max_transport_latency_margin = 20,
			.fabric_average_transport_latency_margin = 10,

			.per_uclk_dpm_params = {
				{
					.minimum_uclk_khz = 97 * 1000,
					.urgent_ramp_uclk_cycles = 472,
					.trip_to_memory_uclk_cycles = 827,
					.meta_trip_to_memory_uclk_cycles = 827,
					.maximum_latency_when_urgent_uclk_cycles = 72,
					.average_latency_when_urgent_uclk_cycles = 61,
					.maximum_latency_when_non_urgent_uclk_cycles = 827,
					.average_latency_when_non_urgent_uclk_cycles = 118,
				},
			},
		},
	},
	.qos_type = dml2_qos_param_type_dcn4x,
};

static const struct dml2_soc_bb dml2_socbb_dcn401 = {
	.clk_table = {
		.uclk = {
				.clk_values_khz = {97000},
				.num_clk_values = 1,
		},
		.fclk = {
				.clk_values_khz = {300000, 2500000},

Annotation

Implementation Notes