drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/dml_top_types.h
Extension
.h
Size
22267 bytes
Lines
749
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dml2_pmo_options {
	bool disable_vblank;
	bool disable_svp;
	bool disable_drr_var;
	bool disable_drr_clamped;
	bool disable_drr_var_when_var_active;
	bool disable_drr_clamped_when_var_active;
	bool disable_fams2;
	bool disable_vactive_det_fill_bw_pad; /* dml2_project_dcn4x_stage2_auto_drr_svp and above only */
	bool disable_dyn_odm;
	bool disable_dyn_odm_for_multi_stream;
	bool disable_dyn_odm_for_stream_with_svp;
	bool force_mandatory_uclk_pstate_support;
	struct dml2_pmo_pstate_strategy *override_strategy_lists[DML2_MAX_PLANES];
	unsigned int num_override_strategies_per_list[DML2_MAX_PLANES];
};

struct dml2_options {
	enum dml2_project_id project_id;
	struct dml2_pmo_options pmo_options;
};


struct dml2_initialize_instance_in_out {
	struct dml2_instance *dml2_instance;
	struct dml2_options options;
	struct dml2_soc_bb soc_bb;
	struct dml2_ip_capabilities ip_caps;

	struct {
		void *explicit_ip_bb;
		unsigned int explicit_ip_bb_size;
	} overrides;
};

struct dml2_reset_instance_in_out {
	struct dml2_instance *dml2_instance;
};

struct dml2_check_mode_supported_in_out {
	/*
	* Inputs
	*/
	struct dml2_instance *dml2_instance;
	const struct dml2_display_cfg *display_config;

	/*
	* Outputs
	*/
	bool is_supported;
};

struct dml2_mcache_surface_allocation {
	bool valid;
	/*
	* For iMALL, dedicated mall mcaches are required (sharing of last
	* slice possible), for legacy phantom or phantom without return
	* the only mall mcaches need to be valid.
	*/
	bool requires_dedicated_mall_mcache;

	unsigned int num_mcaches_plane0;
	unsigned int num_mcaches_plane1;
	/*
	* A plane is divided into vertical slices of mcaches,
	* which wrap on the surface width.
	*
	* For example, if the surface width is 7680, and split into
	* three slices of equal width, the boundary array would contain
	* [2560, 5120, 7680]
	*
	* The assignments are
	* 0 = [0 .. 2559]
	* 1 = [2560 .. 5119]
	* 2 = [5120 .. 7679]
	* 0 = [7680 .. INF]
	* The final element implicitly is the same as the first, and
	* at first seems invalid since it is never referenced (since)
	* it is outside the surface. However, its useful when shifting
	* (see below).
	*
	* For any given valid mcache assignment, a shifted version, wrapped
	* on the surface width boundary is also assumed to be valid.
	*
	* For example, shifting [2560, 5120, 7680] by -50 results in
	* [2510, 5170, 7630].
	*
	* The assignments are now:
	* 0 = [0 .. 2509]
	* 1 = [2510 .. 5169]

Annotation

Implementation Notes