drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_shared_types.h- Extension
.h- Size
- 91063 bytes
- Lines
- 2350
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dml2_external_lib_deps.hdml_top_display_cfg_types.hdml_top_types.hlib_frl_cap_check.h
Detected Declarations
struct dml2_core_ip_paramsstruct dml2_core_internal_DmlPipestruct dml2_core_internal_watermarksstruct dml2_core_internal_mode_support_infostruct dml2_core_internal_mode_supportstruct dml2_core_internal_mode_programstruct dml2_core_internal_SOCParametersListstruct dml2_core_calcs_mode_support_localsstruct dml2_core_calcs_mode_programming_localsstruct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_localsstruct dml2_core_calcs_CalculateVMRowAndSwath_localsstruct dml2_core_calcs_CalculateVMRowAndSwath_paramsstruct dml2_core_calcs_CalculatePrefetchSchedule_localsstruct dml2_core_shared_calculate_det_buffer_size_paramsstruct dml2_core_shared_calculate_vm_and_row_bytes_paramsstruct dml2_core_shared_CalculateSwathAndDETConfiguration_localsstruct dml2_core_shared_TruncToValidBPP_localsstruct dml2_core_shared_CalculateDETBufferSize_localsstruct dml2_core_shared_get_urgent_bandwidth_required_localsstruct dml2_core_shared_calculate_peak_bandwidth_required_localsstruct dml2_core_shared_CalculateFlipSchedule_localsstruct dml2_core_shared_rq_dlg_get_dlg_reg_localsstruct dml2_core_shared_CalculateMetaAndPTETimes_paramsstruct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_paramsstruct dml2_core_calcs_CalculateSwathAndDETConfiguration_paramsstruct dml2_core_calcs_CalculateStutterEfficiency_localsstruct dml2_core_calcs_CalculateStutterEfficiency_paramsstruct dml2_core_calcs_CalculatePrefetchSchedule_paramsstruct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_paramsstruct dml2_core_calcs_CheckGlobalPrefetchAdmissibility_localsstruct dml2_core_calcs_calculate_mcache_row_bytes_paramsstruct dml2_core_shared_calculate_mcache_setting_localsstruct dml2_core_calcs_calculate_mcache_setting_paramsstruct dml2_core_calcs_calculate_tdlut_setting_paramsstruct dml2_core_calcs_calculate_peak_bandwidth_required_paramsstruct dml2_core_calcs_calculate_bytes_to_fetch_required_to_hide_latency_paramsstruct dml2_core_shared_calculation_funcsstruct dml2_core_internal_scratchstruct dml2_core_internal_display_mode_libstruct dml2_core_calcs_mode_support_exstruct core_display_cfg_support_infostruct dml2_core_calcs_mode_programming_exenum dml2_core_internal_request_typeenum dml2_core_internal_bw_typeenum dml2_core_internal_soc_state_typeenum dml2_core_internal_output_typeenum dml2_core_internal_output_type_rate
Annotated Snippet
struct dml2_core_ip_params {
unsigned int vblank_nom_default_us;
unsigned int remote_iommu_outstanding_translations;
unsigned int rob_buffer_size_kbytes;
unsigned int config_return_buffer_size_in_kbytes;
unsigned int config_return_buffer_segment_size_in_kbytes;
unsigned int compressed_buffer_segment_size_in_kbytes;
unsigned int meta_fifo_size_in_kentries;
unsigned int dpte_buffer_size_in_pte_reqs_luma;
unsigned int dpte_buffer_size_in_pte_reqs_chroma;
unsigned int pixel_chunk_size_kbytes;
unsigned int alpha_pixel_chunk_size_kbytes;
unsigned int min_pixel_chunk_size_bytes;
unsigned int writeback_chunk_size_kbytes;
unsigned int line_buffer_size_bits;
unsigned int max_line_buffer_lines;
unsigned int writeback_interface_buffer_size_kbytes;
unsigned int max_num_dpp;
unsigned int max_num_opp;
unsigned int max_num_otg;
unsigned int TDLUT_33cube_count;
unsigned int max_num_wb;
unsigned int max_dchub_pscl_bw_pix_per_clk;
unsigned int max_pscl_lb_bw_pix_per_clk;
unsigned int max_lb_vscl_bw_pix_per_clk;
unsigned int max_vscl_hscl_bw_pix_per_clk;
double max_hscl_ratio;
double max_vscl_ratio;
unsigned int max_hscl_taps;
unsigned int max_vscl_taps;
unsigned int odm_combine_support_mask;
unsigned int num_dsc;
unsigned int maximum_dsc_bits_per_component;
unsigned int maximum_pixels_per_line_per_dsc_unit;
bool dsc422_native_support;
bool cursor_64bpp_support;
double dispclk_ramp_margin_percent;
unsigned int dppclk_delay_subtotal;
unsigned int dppclk_delay_scl;
unsigned int dppclk_delay_scl_lb_only;
unsigned int dppclk_delay_cnvc_formatter;
unsigned int dppclk_delay_cnvc_cursor;
unsigned int cursor_buffer_size;
unsigned int cursor_chunk_size;
unsigned int dispclk_delay_subtotal;
bool dynamic_metadata_vm_enabled;
unsigned int max_inter_dcn_tile_repeaters;
unsigned int max_num_hdmi_frl_outputs;
unsigned int max_num_dp2p0_outputs;
unsigned int max_num_dp2p0_streams;
bool dcc_supported;
bool ptoi_supported;
double writeback_max_hscl_ratio;
double writeback_max_vscl_ratio;
double writeback_min_hscl_ratio;
double writeback_min_vscl_ratio;
unsigned int writeback_max_hscl_taps;
unsigned int writeback_max_vscl_taps;
unsigned int writeback_line_buffer_buffer_size;
unsigned int words_per_channel;
bool imall_supported;
unsigned int max_flip_time_us;
unsigned int max_flip_time_lines;
unsigned int subvp_swath_height_margin_lines;
unsigned int subvp_fw_processing_delay_us;
unsigned int subvp_pstate_allow_width_us;
// MRQ
bool dcn_mrq_present;
unsigned int zero_size_buffer_entries;
unsigned int compbuf_reserved_space_zs;
unsigned int dcc_meta_buffer_size_bytes;
unsigned int meta_chunk_size_kbytes;
unsigned int min_meta_chunk_size_bytes;
unsigned int dchub_arb_to_ret_delay; // num of dcfclk
unsigned int hostvm_mode;
};
struct dml2_core_internal_DmlPipe {
double Dppclk;
double Dispclk;
double PixelClock;
double DCFClkDeepSleep;
unsigned int DPPPerSurface;
bool ScalerEnabled;
bool UPSPEnabled;
unsigned int UPSPVTaps;
enum dml2_sample_positioning UPSPSamplePositioning;
enum dml2_rotation_angle RotationAngle;
Annotation
- Immediate include surface: `dml2_external_lib_deps.h`, `dml_top_display_cfg_types.h`, `dml_top_types.h`, `lib_frl_cap_check.h`.
- Detected declarations: `struct dml2_core_ip_params`, `struct dml2_core_internal_DmlPipe`, `struct dml2_core_internal_watermarks`, `struct dml2_core_internal_mode_support_info`, `struct dml2_core_internal_mode_support`, `struct dml2_core_internal_mode_program`, `struct dml2_core_internal_SOCParametersList`, `struct dml2_core_calcs_mode_support_locals`, `struct dml2_core_calcs_mode_programming_locals`, `struct dml2_core_calcs_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_locals`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.