drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn3.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/dml2_pmo_dcn3.c- Extension
.c- Size
- 25491 bytes
- Lines
- 707
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dml2_pmo_factory.hdml2_pmo_dcn3.h
Detected Declarations
function sortfunction get_max_reserved_time_on_all_planes_with_stream_indexfunction set_reserved_time_on_all_planes_with_stream_indexfunction remove_duplicatesfunction increase_mpc_combine_factorfunction optimize_dcc_mcache_no_odmfunction iterate_to_next_candidiatefunction increase_odm_combine_factorfunction count_planes_with_stream_indexfunction are_timings_trivially_synchronizablefunction pmo_dcn3_initializefunction is_h_timing_divisible_byfunction is_dp_encoderfunction pmo_dcn3_init_for_vminfunction pmo_dcn3_test_for_vminfunction find_highest_odm_load_stream_indexfunction pmo_dcn3_optimize_for_vminfunction pmo_dcn3_optimize_dcc_mcachefunction pmo_dcn3_init_for_pstate_supportfunction pmo_dcn3_test_for_pstate_supportfunction pmo_dcn3_optimize_for_pstate_support
Annotated Snippet
if (list_a[j] != list_a[i]) {
j++;
list_a[j] = list_a[i];
}
}
*list_a_size = j + 1;
}
static bool increase_mpc_combine_factor(unsigned int *mpc_combine_factor, unsigned int limit)
{
if (*mpc_combine_factor < limit) {
(*mpc_combine_factor)++;
return true;
}
return false;
}
static bool optimize_dcc_mcache_no_odm(struct dml2_pmo_optimize_dcc_mcache_in_out *in_out,
int free_pipes)
{
struct dml2_pmo_instance *pmo = in_out->instance;
unsigned int i;
bool result = true;
for (i = 0; i < in_out->optimized_display_cfg->num_planes; i++) {
// For pipes that failed dcc mcache check, we want to increase the pipe count.
// The logic for doing this depends on how many pipes is already being used,
// and whether it's mpcc or odm combine.
if (!in_out->dcc_mcache_supported[i]) {
// For the general case of "n displays", we can only optimize streams with an ODM combine factor of 1
if (in_out->cfg_support_info->stream_support_info[in_out->optimized_display_cfg->plane_descriptors[i].stream_index].odms_used == 1) {
in_out->optimized_display_cfg->plane_descriptors[i].overrides.mpcc_combine_factor =
in_out->cfg_support_info->plane_support_info[i].dpps_used;
// For each plane that is not passing mcache validation, just add another pipe to it, up to the limit.
if (free_pipes > 0) {
if (!increase_mpc_combine_factor(&in_out->optimized_display_cfg->plane_descriptors[i].overrides.mpcc_combine_factor,
pmo->mpc_combine_limit)) {
// We've reached max pipes allocatable to a single plane, so we fail.
result = false;
break;
} else {
// Successfully added another pipe to this failing plane.
free_pipes--;
}
} else {
// No free pipes to add.
result = false;
break;
}
} else {
// If the stream of this plane needs ODM combine, no further optimization can be done.
result = false;
break;
}
}
}
return result;
}
static bool iterate_to_next_candidiate(struct dml2_pmo_instance *pmo, int size)
{
int borrow_from, i;
bool success = false;
if (pmo->scratch.pmo_dcn3.current_candidate[0] > 0) {
pmo->scratch.pmo_dcn3.current_candidate[0]--;
success = true;
} else {
for (borrow_from = 1; borrow_from < size && pmo->scratch.pmo_dcn3.current_candidate[borrow_from] == 0; borrow_from++)
;
if (borrow_from < size) {
pmo->scratch.pmo_dcn3.current_candidate[borrow_from]--;
for (i = 0; i < borrow_from; i++) {
pmo->scratch.pmo_dcn3.current_candidate[i] = pmo->scratch.pmo_dcn3.reserved_time_candidates_count[i] - 1;
}
success = true;
}
}
return success;
}
static bool increase_odm_combine_factor(enum dml2_odm_mode *odm_mode, int odms_calculated)
{
Annotation
- Immediate include surface: `dml2_pmo_factory.h`, `dml2_pmo_dcn3.h`.
- Detected declarations: `function sort`, `function get_max_reserved_time_on_all_planes_with_stream_index`, `function set_reserved_time_on_all_planes_with_stream_index`, `function remove_duplicates`, `function increase_mpc_combine_factor`, `function optimize_dcc_mcache_no_odm`, `function iterate_to_next_candidiate`, `function increase_odm_combine_factor`, `function count_planes_with_stream_index`, `function are_timings_trivially_synchronizable`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.