drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/dml2_top_soc15.c
Extension
.c
Size
51749 bytes
Lines
1201
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (optimize_succeeded) {
			l->mode_support_params.instance = &params->dml->core_instance;
			l->mode_support_params.display_cfg = &l->next_candidate_display_cfg;
			l->mode_support_params.min_clk_table = &params->dml->min_clk_table;

			if (l->next_candidate_display_cfg.stage3.performed)
				l->mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage3.min_clk_index_for_latency;
			else
				l->mode_support_params.min_clk_index = l->next_candidate_display_cfg.stage1.min_clk_index_for_latency;
			candidate_validation_passed = params->dml->core_instance.mode_support(&l->mode_support_params);
			l->next_candidate_display_cfg.mode_support_result = l->mode_support_params.mode_support_result;
		}

		if (optimize_succeeded && candidate_validation_passed) {
			memset(&test_params, 0, sizeof(struct optimization_test_function_params));
			test_params.locals = &l->test_function_locals;
			test_params.dml = params->dml;
			test_params.display_config = &l->next_candidate_display_cfg;
			test_passed = params->test_function(&test_params);

			copy_display_configuration_with_meta(&l->cur_candidate_display_cfg, &l->next_candidate_display_cfg);

			// If optimization is not all or nothing, then store partial progress in output
			if (!params->all_or_nothing)
				copy_display_configuration_with_meta(params->optimized_display_config, &l->next_candidate_display_cfg);
		}
	}

	if (test_passed)
		copy_display_configuration_with_meta(params->optimized_display_config, &l->cur_candidate_display_cfg);

	return test_passed;
}

static bool dml2_top_optimization_perform_optimization_phase_1(struct dml2_optimization_phase_locals *l, const struct optimization_phase_params *params)
{
	int highest_state, lowest_state, cur_state;
	bool supported = false;

	if (!params->dml ||
		!params->optimize_function ||
		!params->test_function ||
		!params->display_config ||
		!params->optimized_display_config)
		return false;

	copy_display_configuration_with_meta(&l->cur_candidate_display_cfg, params->display_config);
	highest_state = l->cur_candidate_display_cfg.stage1.min_clk_index_for_latency;
	lowest_state = 0;

	while (highest_state > lowest_state) {
		cur_state = (highest_state + lowest_state) / 2;

		l->mode_support_params.instance = &params->dml->core_instance;
		l->mode_support_params.display_cfg = &l->cur_candidate_display_cfg;
		l->mode_support_params.min_clk_table = &params->dml->min_clk_table;
		l->mode_support_params.min_clk_index = cur_state;
		supported = params->dml->core_instance.mode_support(&l->mode_support_params);

		if (supported) {
			l->cur_candidate_display_cfg.mode_support_result = l->mode_support_params.mode_support_result;
			highest_state = cur_state;
		} else {
			lowest_state = cur_state + 1;
		}
	}
	l->cur_candidate_display_cfg.stage1.min_clk_index_for_latency = lowest_state;

	copy_display_configuration_with_meta(params->optimized_display_config, &l->cur_candidate_display_cfg);

	return true;
}

/*
* Takes an input set of mcache boundaries and finds the appropriate setting of cache programming.
* Returns true if a valid set of programming can be made, and false otherwise. "Valid" means
* that the horizontal viewport does not span more than 2 cache slices.
*
* It optionally also can apply a constant shift to all the cache boundaries.
*/
static const uint32_t MCACHE_ID_UNASSIGNED = 0xF;
static const uint32_t SPLIT_LOCATION_UNDEFINED = 0xFFFF;

static bool calculate_first_second_splitting(const int *mcache_boundaries, int num_boundaries, int shift,
	int pipe_h_vp_start, int pipe_h_vp_end, int *first_offset, int *second_offset)
{
	const int MAX_VP = 0xFFFFFF;
	int left_cache_id;
	int right_cache_id;
	int range_start;

Annotation

Implementation Notes