drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.h
Extension
.h
Size
2485 bytes
Lines
84
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dcn201_dpp_shift {
	TF_REG_FIELD_LIST_DCN201(uint8_t);
};

struct dcn201_dpp_mask {
	TF_REG_FIELD_LIST_DCN201(uint32_t);
};

#define DPP_DCN201_REG_VARIABLE_LIST \
	DPP_DCN2_REG_VARIABLE_LIST

struct dcn201_dpp_registers {
	DPP_DCN201_REG_VARIABLE_LIST;
};

struct dcn201_dpp {
	struct dpp base;

	const struct dcn201_dpp_registers *tf_regs;
	const struct dcn201_dpp_shift *tf_shift;
	const struct dcn201_dpp_mask *tf_mask;

	const uint16_t *filter_v;
	const uint16_t *filter_h;
	const uint16_t *filter_v_c;
	const uint16_t *filter_h_c;
	int lb_pixel_depth_supported;
	int lb_memory_size;
	int lb_bits_per_entry;
	bool is_write_to_ram_a_safe;
	struct scaler_data scl_data;
	struct pwl_params pwl_data;
};

bool dpp201_construct(struct dcn201_dpp *dpp2,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn201_dpp_registers *tf_regs,
	const struct dcn201_dpp_shift *tf_shift,
	const struct dcn201_dpp_mask *tf_mask);

#endif /* __DC_HWSS_DCN201_H__ */

Annotation

Implementation Notes