drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.h
Extension
.h
Size
38160 bytes
Lines
753
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dcn401_dpp_registers {
	DPP_REG_VARIABLE_LIST_DCN401;
	uint32_t ALPHA_2BIT_LUT01;
	uint32_t ALPHA_2BIT_LUT23;
};

struct dcn401_dpp_shift {
	DPP_REG_FIELD_LIST_DCN401(uint8_t);
};

struct dcn401_dpp_mask {
	DPP_REG_FIELD_LIST_DCN401(uint32_t);
};

struct dcn401_dpp {
	struct dpp base;

	const struct dcn401_dpp_registers *tf_regs;
	const struct dcn401_dpp_shift *tf_shift;
	const struct dcn401_dpp_mask *tf_mask;

	const uint16_t *filter_v;
	const uint16_t *filter_h;
	const uint16_t *filter_v_c;
	const uint16_t *filter_h_c;
	int lb_pixel_depth_supported;
	int lb_memory_size;
	int lb_bits_per_entry;
	bool is_write_to_ram_a_safe;
	struct scaler_data scl_data;
	struct pwl_params pwl_data;
};

enum dcn401_dscl_mode_sel {
	DCN401_DSCL_MODE_SCALING_444_BYPASS = 0,
	DCN401_DSCL_MODE_SCALING_444_RGB_ENABLE = 1,
	DCN401_DSCL_MODE_SCALING_444_YCBCR_ENABLE = 2,
	DCN401_DSCL_MODE_SCALING_420_YCBCR_ENABLE = 3,
	DCN401_DSCL_MODE_SCALING_420_LUMA_BYPASS = 4,
	DCN401_DSCL_MODE_SCALING_420_CHROMA_BYPASS = 5,
	DCN401_DSCL_MODE_DSCL_BYPASS = 6
};

bool dpp401_construct(struct dcn401_dpp *dpp401,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn401_dpp_registers *tf_regs,
	const struct dcn401_dpp_shift *tf_shift,
	const struct dcn401_dpp_mask *tf_mask);

void dpp401_dscl_set_scaler_manual_scale(
	struct dpp *dpp_base,
	const struct scaler_data *scl_data);

void dpp401_dpp_setup(
	struct dpp *dpp_base,
	enum surface_pixel_format format,
	enum expansion_mode mode,
	struct dc_csc_transform input_csc_color_matrix,
	enum dc_color_space input_color_space,
	struct cnv_alpha_2bit_lut *alpha_2bit_lut);

void dpp401_set_cursor_attributes(
	struct dpp *dpp_base,
	struct dc_cursor_attributes *cursor_attributes);

void dpp401_set_cursor_position(
	struct dpp *dpp_base,
	const struct dc_cursor_position *pos,
	const struct dc_cursor_mi_param *param,
	uint32_t width,
	uint32_t height);

void dpp401_set_optional_cursor_attributes(
	struct dpp *dpp_base,
	struct dpp_cursor_attributes *attr);

void dscl401_calc_lb_num_partitions(
		const struct scaler_data *scl_data,
		enum lb_memory_config lb_config,
		int *num_part_y,
		int *num_part_c);

void dscl401_spl_calc_lb_num_partitions(
		bool alpha_en,
		const struct spl_scaler_data *scl_data,
		enum lb_memory_config lb_config,
		int *num_part_y,
		int *num_part_c);

Annotation

Implementation Notes