drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/amd/display/dc/dpp/dcn42/dcn42_dpp.h

Extension

.h

Size

28513 bytes

Lines

470

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• dcn401/dcn401_dpp.h

Detected Declarations

• struct dcn42_dpp_registers
• struct dcn42_dpp_shift
• struct dcn42_dpp_mask
• struct dcn42_dpp

Annotated Snippet

struct dcn42_dpp_registers {
	DPP_REG_VARIABLE_LIST_DCN42;
};

struct dcn42_dpp_shift {
	DPP_REG_FIELD_LIST_DCN42(uint8_t);
};

struct dcn42_dpp_mask {
	DPP_REG_FIELD_LIST_DCN42(uint32_t);
};
struct dcn42_dpp {
	struct dpp base;
	const struct dcn42_dpp_registers *tf_regs;
	const struct dcn42_dpp_shift *tf_shift;
	const struct dcn42_dpp_mask *tf_mask;
	const uint16_t *filter_v;
	const uint16_t *filter_h;
	const uint16_t *filter_v_c;
	const uint16_t *filter_h_c;
	int lb_pixel_depth_supported;
	int lb_memory_size;
	int lb_bits_per_entry;
	bool is_write_to_ram_a_safe;
	struct scaler_data scl_data;
	struct pwl_params pwl_data;
};

bool dpp42_construct(struct dcn42_dpp *dpp42,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn42_dpp_registers *tf_regs,
	const struct dcn42_dpp_shift *tf_shift,
	const struct dcn42_dpp_mask *tf_mask);


#endif /* __DCN42_DPP_H__ */

Annotation

• Immediate include surface: `dcn401/dcn401_dpp.h`.
• Detected declarations: `struct dcn42_dpp_registers`, `struct dcn42_dpp_shift`, `struct dcn42_dpp_mask`, `struct dcn42_dpp`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.