drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb.c
Extension
.c
Size
8276 bytes
Lines
274
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "reg_helper.h"
#include "resource.h"
#include "dwb.h"
#include "dcn30_dwb.h"


#define REG(reg)\
	dwbc30->dwbc_regs->reg

#define CTX \
	dwbc30->base.ctx

#undef FN
#define FN(reg_name, field_name) \
	dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name

#define DC_LOGGER \
	dwbc30->base.ctx->logger

static bool dwb3_get_caps(struct dwbc *dwbc, struct dwb_caps *caps)
{
	(void)dwbc;
	if (caps) {
		caps->adapter_id = 0;	/* we only support 1 adapter currently */
		caps->hw_version = DCN_VERSION_3_0;
		caps->num_pipes = 2;
		memset(&caps->reserved, 0, sizeof(caps->reserved));
		memset(&caps->reserved2, 0, sizeof(caps->reserved2));
		caps->sw_version = dwb_ver_2_0;
		caps->caps.support_dwb = true;
		caps->caps.support_ogam = true;
		caps->caps.support_wbscl = true;
		caps->caps.support_ocsc = false;
		caps->caps.support_stereo = true;
		return true;
	} else {
		return false;
	}
}

void dwb3_config_fc(struct dwbc *dwbc, struct dc_dwb_params *params)
{
	struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc);

	/* Set DWB source size */
	REG_UPDATE_2(FC_SOURCE_SIZE, FC_SOURCE_WIDTH, params->cnv_params.src_width,
			FC_SOURCE_HEIGHT, params->cnv_params.src_height);

	/* source size is not equal the source size, then enable cropping. */
	if (params->cnv_params.crop_en) {
		REG_UPDATE(FC_MODE_CTRL,    FC_WINDOW_CROP_EN, 1);
		REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_X, params->cnv_params.crop_x);
		REG_UPDATE(FC_WINDOW_START, FC_WINDOW_START_Y, params->cnv_params.crop_y);
		REG_UPDATE(FC_WINDOW_SIZE,  FC_WINDOW_WIDTH,   params->cnv_params.crop_width);
		REG_UPDATE(FC_WINDOW_SIZE,  FC_WINDOW_HEIGHT,  params->cnv_params.crop_height);
	} else {
		REG_UPDATE(FC_MODE_CTRL,    FC_WINDOW_CROP_EN, 0);
	}

	/* Set CAPTURE_RATE */
	REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_RATE, params->capture_rate);

	dwb3_set_stereo(dwbc, &params->stereo_params);
}

bool dwb3_enable(struct dwbc *dwbc, struct dc_dwb_params *params)
{
	struct dcn30_dwbc *dwbc30 = TO_DCN30_DWBC(dwbc);
	DC_LOG_DWB("%s dwb3_enabled at inst = %d", __func__, dwbc->inst);

	/* Set WB_ENABLE (not double buffered; capture not enabled) */
	REG_UPDATE(DWB_ENABLE_CLK_CTRL, DWB_ENABLE, 1);

	/* Set FC parameters */
	dwb3_config_fc(dwbc, params);

	/* Program color processing unit */
	dwb3_program_hdr_mult(dwbc, params);
	dwb3_set_gamut_remap(dwbc, params);
	dwb3_ogam_set_input_transfer_func(dwbc, params->out_transfer_func);

	/* Program output denorm */
	dwb3_set_denorm(dwbc, params);

	/* Enable DWB capture enable (double buffered) */
	REG_UPDATE(FC_MODE_CTRL, FC_FRAME_CAPTURE_EN, DWB_FRAME_CAPTURE_ENABLE);

	/* First pixel count */
	REG_UPDATE(FC_FLOW_CTRL, FC_FIRST_PIXEL_DELAY_COUNT, 96);

Annotation

Implementation Notes