drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_factory_dcn42b.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_factory_dcn42b.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/display/dc/gpio/dcn42b/hw_factory_dcn42b.c
Extension
.c
Size
7442 bytes
Lines
314
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: MIT
//
// Copyright 2026 Advanced Micro Devices, Inc.

#include "dm_services.h"
#include "include/gpio_types.h"
#include "../hw_factory.h"

#include "../hw_gpio.h"
#include "../hw_ddc.h"
#include "../hw_hpd.h"
#include "../hw_generic.h"

#include "dcn/dcn_4_2_1_offset.h"
#include "dcn/dcn_4_2_1_sh_mask.h"
#include "dpcs/dpcs_4_0_1_offset.h"
#include "dpcs/dpcs_4_0_1_sh_mask.h"

#include "reg_helper.h"
#include "../hpd_regs.h"
#include "hw_factory_dcn42b.h"

#define DCN_BASE__INST0_SEG2                       0x000034C0

/* DCN */
#define block HPD
#define reg_num 0

#undef BASE_INNER
#define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg

#define BASE(seg) BASE_INNER(seg)

#define REG(reg_name) \
	BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name

#define SF_HPD(reg_name, field_name, post_fix) \
	.field_name = HPD0_ ## reg_name ## __ ## field_name ## post_fix

#define REGI(reg_name, block, id) \
	BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
			reg ## block ## id ## _ ## reg_name

#define SF(reg_name, field_name, post_fix) \
	.field_name = reg_name ## __ ## field_name ## post_fix

/* macros to expend register list macro defined in HW object header file
 * end *********************/

#undef HPD_REG_LIST
#define HPD_REG_LIST(id) \
	.int_status = REGI(DC_HPD_INT_STATUS, HPD, id), \
	.toggle_filt_cntl = REGI(DC_HPD_TOGGLE_FILT_CNTL, HPD, id)

#define hpd_regs(id) \
{ \
	HPD_REG_LIST(id) \
}

static const struct hpd_registers hpd_regs[] = {
	hpd_regs(0),
	hpd_regs(1),
	hpd_regs(2),
    //hpd_regs(3),
    //hpd_regs(4),
};

static const struct hpd_sh_mask hpd_shift = {
	HPD_MASK_SH_LIST(__SHIFT)
};

static const struct hpd_sh_mask hpd_mask = {
	HPD_MASK_SH_LIST(_MASK)
};

#include "../ddc_regs.h"

#define SF_DDC(reg_name, field_name, post_fix) \
	.field_name = reg_name ## __ ## field_name ## post_fix

static const struct ddc_registers ddc_data_regs_dcn[] = {
	{
		// add a dummy entry for cases no such port
		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,},
		.ddc_setup = 0,
		.phy_aux_cntl = 0,
		.dc_gpio_aux_ctrl_5 = 0
	},
	{
		// add a dummy entry for cases no such port

Annotation

Implementation Notes