drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/gpio/hpd_regs.h- Extension
.h- Size
- 2723 bytes
- Lines
- 80
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gpio_regs.h
Detected Declarations
struct hpd_registersstruct hpd_sh_mask
Annotated Snippet
struct hpd_registers {
struct gpio_registers gpio;
uint32_t int_status;
uint32_t toggle_filt_cntl;
};
struct hpd_sh_mask {
/* int_status */
uint32_t DC_HPD_SENSE_DELAYED;
uint32_t DC_HPD_SENSE;
/* toggle_filt_cntl */
uint32_t DC_HPD_CONNECT_INT_DELAY;
uint32_t DC_HPD_DISCONNECT_INT_DELAY;
};
#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_ */
Annotation
- Immediate include surface: `gpio_regs.h`.
- Detected declarations: `struct hpd_registers`, `struct hpd_sh_mask`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.