drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c- Extension
.c- Size
- 3302 bytes
- Lines
- 130
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/slab.hdm_services.hinclude/gpio_interface.hinclude/gpio_types.hhw_gpio.hhw_generic.hreg_helper.hgeneric_regs.h
Detected Declarations
struct gpiofunction dal_hw_generic_destructfunction dal_hw_generic_destroyfunction set_configfunction dal_hw_generic_constructfunction dal_hw_generic_init
Annotated Snippet
#include <linux/slab.h>
#include "dm_services.h"
#include "include/gpio_interface.h"
#include "include/gpio_types.h"
#include "hw_gpio.h"
#include "hw_generic.h"
#include "reg_helper.h"
#include "generic_regs.h"
#undef FN
#define FN(reg_name, field_name) \
gpio_reg_shift(generic->shifts->field_name), generic->masks->field_name
#define CTX \
generic->base.base.ctx
#define REG(reg)\
(generic->regs->reg)
struct gpio;
static void dal_hw_generic_destruct(
struct hw_generic *pin)
{
dal_hw_gpio_destruct(&pin->base);
}
static void dal_hw_generic_destroy(
struct hw_gpio_pin **ptr)
{
struct hw_generic *generic = HW_GENERIC_FROM_BASE(*ptr);
dal_hw_generic_destruct(generic);
kfree(generic);
*ptr = NULL;
}
static enum gpio_result set_config(
struct hw_gpio_pin *ptr,
const struct gpio_config_data *config_data)
{
struct hw_generic *generic = HW_GENERIC_FROM_BASE(ptr);
if (!config_data)
return GPIO_RESULT_INVALID_DATA;
REG_UPDATE_2(mux,
GENERIC_EN, config_data->config.generic_mux.enable_output_from_mux,
GENERIC_SEL, config_data->config.generic_mux.mux_select);
return GPIO_RESULT_OK;
}
static const struct hw_gpio_pin_funcs funcs = {
.destroy = dal_hw_generic_destroy,
.open = dal_hw_gpio_open,
.get_value = dal_hw_gpio_get_value,
.set_value = dal_hw_gpio_set_value,
.set_config = set_config,
.change_mode = dal_hw_gpio_change_mode,
.close = dal_hw_gpio_close,
};
static void dal_hw_generic_construct(
struct hw_generic *pin,
enum gpio_id id,
uint32_t en,
struct dc_context *ctx)
{
dal_hw_gpio_construct(&pin->base, id, en, ctx);
pin->base.base.funcs = &funcs;
}
void dal_hw_generic_init(
struct hw_generic **hw_generic,
struct dc_context *ctx,
enum gpio_id id,
uint32_t en)
{
if (en > GPIO_DDC_LINE_MAX) {
ASSERT_CRITICAL(false);
*hw_generic = NULL;
}
*hw_generic = kzalloc_obj(struct hw_generic);
if (!*hw_generic) {
Annotation
- Immediate include surface: `linux/slab.h`, `dm_services.h`, `include/gpio_interface.h`, `include/gpio_types.h`, `hw_gpio.h`, `hw_generic.h`, `reg_helper.h`, `generic_regs.h`.
- Detected declarations: `struct gpio`, `function dal_hw_generic_destruct`, `function dal_hw_generic_destroy`, `function set_config`, `function dal_hw_generic_construct`, `function dal_hw_generic_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.